Multi-Bit Flip-Flop Inverter Path for Noise-Resistant Output
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Solution Overview
Problem
Conventional multi-bit flip-flops without output circuits are susceptible to noise due to unstable internal potential states, leading to noise propagation and increased susceptibility, and they occupy larger areas which is undesirable in semiconductor integrated circuits.
Innovation Solution
The semiconductor integrated circuit design includes a multi-bit flip-flop configuration with a first and second flip-flop, each comprising an input circuit, a master latch, a slave latch, and a clock generation circuit providing a common clock signal, with a signal propagation path that includes at least two stages of inverters to reshape the signal waveform, eliminating the need for an output circuit and reducing noise susceptibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the output circuit is eliminated to reduce area, then the chip area is reduced, but the flip-flop becomes susceptible to noise due to unstable internal potential states
Solution Approach 1:
The patent introduces an inverter circuit as an intermediary element between the internal latch and the output terminal. This inverter acts as a mediator that reshapes the output signal waveform, ensuring stable signal levels even when the internal potential state is unstable. The inverter's regenerative action restores degraded signals, preventing noise propagation to external circuits while maintaining the eliminated output circuit structure.
Solution Approach 2:
The patent applies preliminary action by pre-shaping the signal waveform through the inverter circuit before the signal reaches the output terminal. The inverter proactively corrects potential signal degradation and instability issues before they can propagate outward, ensuring that the output signal is always clean and stable regardless of internal state fluctuations.
2Speed
If the signal propagation path is shortened by eliminating the output circuit, then the signal transmission speed is improved, but the waveform is not sufficiently reshaped leading to noise susceptibility
Solution Approach 1:
The inverter circuit serves as a compact intermediary that provides sufficient waveform reshaping within the shortened signal path. Despite the reduced propagation distance, the inverter's high-gain regenerative action ensures complete signal restoration and sharp waveform edges, maintaining signal integrity without requiring a long propagation path.
Solution Approach 2:
The patent utilizes parameter changes by leveraging the inverter's voltage transfer characteristics and gain properties to achieve effective waveform reshaping. The inverter transforms the input signal parameters (voltage levels, edge slopes) into optimized output parameters, ensuring clean digital transitions even with minimal propagation delay.
Data Source
AI summary
A semiconductor integrated circuit includes a first flip-flop that includes a first slave latch, a second flip-flop that includes a second slave latch, and a clock generation circuit that provides a common clock signal to the first flip-flop and the second flip-flop. The first slave latch includes a first inverter, a first feedback inverter that receives an output signal from the first inverter, and a first switch that is connected between an input terminal of the first inverter and an output terminal of the first feedback inverter. The first flip-flop outputs an output signal from the output terminal of the first feedback inverter.