Multi-Bit Memory Parity Sensing for Error Correction
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Solution Overview
Problem
High-density memory storage systems face challenges in maintaining data integrity due to environmental fluctuations and inefficient use of bandwidth, limiting the number of bits that can be stored in each memory cell.
Innovation Solution
A system and method where memory cells are grouped with a parity cell, allowing for high-precision sensing of characteristic parameters and constructing probability distribution functions to identify and correct errors by associating binary values with the most probable distribution, thereby maximizing information storage without compromising data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bits stored in a single memory cell is increased to maximize information storage, then manufacturing cost per bit is reduced, but data integrity becomes more difficult to maintain due to environmental fluctuations
Solution Approach 1:
The memory cell population is divided into multiple groups, with each group containing data cells and a dedicated parity cell. This segmentation allows for localized error detection and correction, enabling higher storage density while maintaining data integrity through group-level redundancy.
Solution Approach 2:
Parity bits are pre-calculated and stored alongside data bits before reading operations. This preliminary action enables rapid error detection and correction during read operations without requiring complex real-time computation, thus maintaining both high storage density and data reliability.
2Reliability
If wide bands of parameter values are used to represent binary values to guard against parameter dispersion, then data integrity is maintained, but the available spectrum for multiple bit storage is reduced
Solution Approach 1:
The patent replaces traditional wide-band parameter value allocation with a statistical error correction mechanism. Instead of allocating excessive parameter space for each bit, the system uses parity bits and statistical analysis to correct errors, allowing tighter band allocation and higher storage density while maintaining integrity.
Solution Approach 2:
The system changes from using wide parameter value bands for error protection to using statistical parameters (probability distributions, mean values, standard deviations) for error detection and correction. This parameter transformation enables more efficient use of the available parameter spectrum.
3Measurement precision
If high precision sensing of characteristic parameters is performed for all memory cells, then error detection accuracy is improved, but system complexity and processing time increase
Solution Approach 1:
The sensing and processing operations are segmented at the group level rather than individual cell level. High precision sensing is performed on characteristic parameters for each group, and parity verification is conducted at the group level, reducing overall system complexity while maintaining detection accuracy.
Solution Approach 2:
The system performs high precision sensing selectively on parity cells and characteristic parameters rather than all memory cell parameters. This partial action approach achieves sufficient error detection accuracy without the excessive complexity of full-system high precision sensing.
Data Source
AI summary
A system and method for operating a collection of memory cells includes storing binary data values and parity data values by associating binary values with a common adjustable characteristic parameter of a memory cell collection. Probability distribution functions for values of the characteristic parameter of the memory cell collection are read and constructed. Binary data values and parity data values stored in the memory cell collection are retrieved. Parity data for error detection and error correction is evaluated in the binary data values.


