Multi-Bit Memory Writing with Data-Based Verify Voltage
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Solution Overview
Problem
Existing semiconductor memory devices face unacceptably long times for writing and reading multi-bit data due to the need for multiple write operations and lengthy verification processes.
Innovation Solution
A semiconductor memory device with a control circuit that performs multi-bit-data writing in two steps, including a first programming of one memory cell, reading of data from that cell, a second programming of an adjacent cell, and a verification process based on the read data, with a verify voltage set on the second word line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-bit data is written by performing write operation multiple times, then data storage capacity is improved, but writing time becomes unacceptably long
Solution Approach 1:
The write operation is divided into two distinct phases: a first programming phase that programs one memory cell, and a second programming phase that programs an adjacent memory cell. This segmentation allows parallel processing of multiple cells, reducing the total write time while maintaining multi-bit data storage capacity.
Solution Approach 2:
The first programming operation is completed and verified before initiating the second programming operation. This preliminary action ensures data integrity while optimizing the overall write sequence, allowing the system to prepare and execute subsequent operations more efficiently.
2Reliability
If verification process is performed thoroughly, then data accuracy is improved, but reading time becomes unacceptably long
Solution Approach 1:
The verification process is segmented into two separate verification operations: a first verification for the first memory cell and a second verification for the second memory cell. These verifications are performed at different times, allowing thorough checking of data accuracy without requiring all verifications to complete simultaneously, thus reducing overall read time.
Solution Approach 2:
While the first verification is being performed, the second programming operation can be initiated. This continuous utilization of system resources ensures that verification tasks are completed thoroughly without creating idle time, maintaining data accuracy while optimizing read operations.
3Quantity of substance
If multiple write operations are performed for multi-bit data, then storage density is improved, but operation complexity increases
Solution Approach 1:
The complex multi-bit write operation is segmented into manageable first and second programming phases, each targeting specific memory cells. This segmentation simplifies the control logic by breaking down the overall complex operation into simpler, more manageable steps that can be executed sequentially with clear boundaries.
Solution Approach 2:
Instead of writing all multi-bit data to all cells simultaneously (which would be complex), the approach inverts the sequence by first programming one cell completely, then programming the adjacent cell. This inverted sequential approach reduces operational complexity compared to simultaneous multi-cell programming.
Data Source
AI summary
A semiconductor memory device includes a memory string and a control circuit. The memory string includes a first memory cell connected to a first word line and a second memory cell adjacent to the first memory cell and connected to a second word line. The control circuit is configured to perform a multi-bit-data writing with respect to each of the first and second memory cells. The multi-bit-data writing includes, in order, a first programming to program the first memory cell, the first programming with respect to the second memory cell, a reading of first data from the first memory cell, a second programming to program the second memory cell, and a verification of data programmed in the second memory cell. The control circuit is configured to set a verify voltage to be applied to the second word line during the verification based on the first data.