Multi-Bit Delta-Sigma Modulator With Delayed Differential Feedback

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Solution Overview

Problem

Conventional delta-sigma modulators face challenges in achieving low-distortion and high-speed performance for multi-bit operations, particularly due to difficulties in designing analog blocks with low distortion and fast feedback loops, which are essential for wide-band applications.

Innovation Solution

The proposed delta-sigma modulator incorporates a delay circuit and a differential delay circuit to delay and differentially delay the output signal of the analog-to-digital converter, allowing for a feedback signal that compensates for delayed components, and includes a second integrator to process quantization noise, thereby reducing signal distortion and enabling fast multi-bit operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional delta-sigma modulator structure is used, then the quantization noise is minimized in low frequency band, but the analog block cannot achieve both low distortion and high-speed characteristics for wide-band application

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoidoperating speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent segments the feedback loop into multiple parallel paths with different delay characteristics (delay circuit and differential delay circuit). This segmentation allows the system to process multiple bits simultaneously while maintaining low distortion, as each path handles specific delay components separately, resolving the contradiction between high-speed multi-bit operation and low distortion performance.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the full-feed forward architecture is used, then the integrators process only quantization noise with excellent input-dependent distortion characteristic, but the delay component of analog input signal cannot be eliminated in multi-bit signal

Engineering Contradiction:
Improvedistortion characteristicVSAvoidsignal delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where the output of the ADC is delayed by one clock period through delay circuits and fed back to the input. This feedback approach compensates for the delay components introduced in multi-bit signal processing, allowing the system to maintain low distortion characteristics while achieving high-speed operation. The feedback loop ensures that delayed signals are properly compensated, resolving the contradiction between reliability and time loss.

Inventive Principle:
Principle #23Feedback

3Productivity

If a fast feedback loop is implemented for multi-bit operation, then the operating speed is improved, but the delay component accumulation increases signal distortion

Engineering Contradiction:
Improveoperating speedVSAvoiddistortion characteristic
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces delay circuits and differential delay circuits as intermediary elements in the feedback path. These intermediaries manage and compensate for delay components systematically, allowing fast feedback operation without accumulating distortion. The intermediary circuits act as buffers that preserve signal integrity while enabling high-speed multi-bit processing, resolving the contradiction between productivity and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7545301B2Multi-bit delta-sigma modulator
Publication Date: 2009.06.09 ELECTRONICS & TELECOMM RES INST
  • US7545301B2 patent drawing
  • US7545301B2 patent drawing
  • US7545301B2 patent drawing

AI summary

A delta-sigma modulator having a first integrator for integrating an input signal; an analog-to-digital converter for converting the integrated signal into a digital signal; a delay circuit for delaying an output signal of the analog-to-digital converter; and a differential delay circuit for differentially delaying the output signal of the analog-to-digital converter. More particularly, the delta-sigma modulator has low distortion characteristics suitable for multi-bit fast operation, wherein a feedback signal is delayed by one clock period through the delay circuit and the differential delay circuit.