Multi-Bit PWM Signaling for Aircraft Status Synchronization

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Solution Overview

Problem

Existing pulse width modulation (PWM) signaling systems in aircraft are limited to two-state status signaling, failing to convey multiple software-detected statuses of hardware components, which can impact the reliability and coordination of control algorithms in aircraft systems.

Innovation Solution

A multi-bit pulse width modulation signaling system that incorporates multi-bit duty cycle selection logic circuits to encode and decode multiple software and hardware statuses, enabling continuous exchange of status information between control channels to maintain synchronized control of aircraft effectors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If traditional two-state PWM signaling is used, then the system maintains simple signaling structure, but it cannot convey multiple software-detected statuses of hardware components

Engineering Contradiction:
Improvestatus informationVSAvoidsignaling structure
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent segments the status information into multiple discrete states that can be encoded using multi-bit PWM duty cycles. Instead of a single binary state, the PWM signal is divided into multiple distinguishable duty cycle levels, each representing a specific status condition of the hardware component.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a one-dimensional binary signaling system to a multi-dimensional PWM signaling system by utilizing variable duty cycle percentages. This adds a new dimension (duty cycle variation) to the signaling mechanism, enabling multiple status levels to be conveyed through a single communication channel.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multi-bit PWM duty cycle selection logic circuits are added to encode multiple statuses, then multiple hardware and software statuses can be conveyed, but the device complexity increases

Engineering Contradiction:
Improvecontrol system reliabilityVSAvoidlogic circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The PWM signaling system is designed to perform multiple functions: it conveys hardware status, software status, and control commands through a single multi-bit duty cycle encoding mechanism. This universal approach eliminates the need for separate signaling channels for different status types, reducing overall system complexity despite the enhanced functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements feedback mechanisms where the receiving end decodes the multi-bit PWM duty cycle and sends acknowledgment or status confirmation signals. This feedback loop ensures reliable status communication and enables error detection and correction, thereby improving control system reliability.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If PWM duty cycle variations are used to encode multiple statuses, then accurate status conveyance is achieved, but the measurement precision requirements increase

Engineering Contradiction:
Improvestatus detection accuracyVSAvoidduty cycle measurement difficulty
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The patent employs preliminary encoding schemes where the transmitting side prepares and sends standardized multi-bit duty cycle codes for different status conditions. The receiving side uses pre-configured decoding logic that matches incoming duty cycles against known status patterns, enabling accurate and efficient status detection without complex real-time analysis.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3754921B1PWM signaling and encoding multiple statuses
Publication Date: 2025.09.10 HAMILTON SUNDSTRAND CORP
  • EP3754921B1 patent drawingFigure 1
  • EP3754921B1 patent drawingFigure 2
  • EP3754921B1 patent drawingFigure 3

AI summary

A pulse width modulation signaling system includes a first control channel (120) that is configured to receive a hardware Boolean command input from a first hardware status monitor, receive a software multi-bit command input from a first software system, and generate a first pulse width modulated signal that is representative of the Boolean command input and the software multi-bit command input. The hardware Boolean command input is a binary value of either a first state or a second state, the software multi-bit command input comprises a binary value of either a first state or a second state, and the first pulse width modulated signal defines a duty cycle.