Multibit ROM Transistor Conductivity States
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Solution Overview
Problem
Traditional ROM technologies have limitations in storing multiple bits of information per memory cell, leading to lower information densities compared to other memory types like EPROM or RAM.
Innovation Solution
The proposed solution involves using a multibit ROM architecture where the value of each cell is stored as a connectivity or conductivity state of a transistor, achieved by applying different biases to the transistor's terminals. This allows a single circuit element to store multiple bits, significantly increasing information density without requiring more bias generators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional ROM architecture with single-bit storage per cell is used, then device simplicity is maintained, but information density is limited
Solution Approach 1:
The patent changes the parameter of storage capacity from single-bit to multibit by utilizing multiple conductivity states of a single transistor. By applying different bias voltages to the transistor terminals, the transistor can exhibit distinct conductivity states that represent multiple bits of information, thereby increasing information density without proportionally increasing device complexity
Solution Approach 2:
A single transistor is made to perform multiple storage functions by exploiting its ability to operate in different conductivity states. The same transistor structure serves as a multibit storage element rather than requiring separate transistors for each bit, achieving multi-functionality within a unified device architecture
2Quantity of substance
If multiple bias generators are added to achieve multibit storage, then information density increases, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges the bias generation functionality into the existing memory cell structure by utilizing shared bias lines and voltage references. Instead of adding separate bias generators for each transistor, the design combines biasing resources across multiple cells, reducing the number of additional components needed while still achieving multibit storage capability
Solution Approach 2:
The memory cell structure itself is designed to self-bias through internal voltage division and transistor characteristics. The circuit leverages the natural electrical properties of the transistor and associated components to generate the necessary bias conditions for multistate operation without requiring external active bias generation circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables ROM arrays to achieve much higher information densities, potentially providing hundreds of gigabits of integrated ROM storage on a single integrated circuit, which is particularly beneficial for machine intelligence inference applications.
Implementation Method 1
The conductivity state of the element will define a conductivity state of the circuit element such that the value of the multibit ROM cells can be stored as the conductivity state of a circuit element such as a transistor
Data Source
AI summary
Methods and systems which involve computer memories are disclosed herein. A disclosed multibit read only memory (ROM) includes a plurality of voltage generators for generating a plurality of voltages and a transistor having a first node and a second node. The transistor can be a field effect transistor (FET) and the first node can be a gate node and the second node can be a source or drain node. The ROM includes a connection from the first node to a first supply voltage node which is biased by one of the voltages in the plurality of voltages. The ROM includes a connection from the second node to a second supply voltage node which is biased by one of the voltages in the plurality of voltages. The value of a multibit ROM cell in the multibit ROM is stored as a resulting conductivity state of the transistor.