Multicast Router Flood Entry for Switching Processor
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Solution Overview
Problem
Conventional Multicast Control (MC) switching protocols in data center infrastructure are inefficient as they require continuous CPU processing of unregistered multicast data packets until multicast router ports are learned, and necessitate separate entries for each multicast group on a VLAN, leading to resource consumption and network bottlenecks.
Innovation Solution
Implementing a switching processor with integrated logic to manage a Multicast Control table, which allows for a single multicast router flood entry across a VLAN, enabling efficient packet forwarding without CPU trapping and reducing the number of required entries by detecting connected multicast routers and using drop entries when flooding is disabled.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional MC switching protocols are used to forward unregistered multicast data packets, then multicast routing can be established, but the CPU must continuously process packets until router ports are learned, consuming network and system resources
Solution Approach 1:
The patent extracts the CPU from the packet forwarding path by implementing hardware-based multicast forwarding using a Content Addressable Memory (CAM) table. The switching logic directly forwards unregistered multicast packets to learned router ports without CPU intervention, eliminating the continuous CPU processing burden while maintaining reliable multicast routing establishment through protocols like IGMP and PIM.
2Measurement precision
If separate entries are added for each multicast group on a VLAN, then precise multicast packet forwarding can be achieved, but the number of required table entries increases significantly
Solution Approach 1:
The patent merges multiple multicast group entries into a single wildcard entry in the CAM table. Instead of storing separate entries for each multicast group address, the system uses a single entry with a wildcard mask that matches all multicast addresses. This maintains precise forwarding accuracy by still allowing specific router port assignments while dramatically reducing the quantity of table entries required from one per group to one per VLAN.
3Reliability
If unregistered multicast packets are trapped to CPU for processing, then routing decisions can be made, but network throughput is reduced due to CPU bottleneck
Solution Approach 1:
The patent replaces the mechanical CPU processing system with a hardware-based switching logic system. The switching logic includes a CAM table that performs hardware-based lookup and forwarding decisions for unregistered multicast packets. This substitution eliminates the CPU bottleneck, maintaining accurate routing decisions through hardware-based protocol processing while significantly improving network throughput by parallelizing packet forwarding operations.
Data Source
AI summary
In one embodiment, a system includes a switching processor and switching logic integrated with and/or executable by the switching processor. The switching logic is configured to install a Multicast Control (MC) table on the switching processor, the MC table facilitating management of switching across a virtual local area network (VLAN) via the switching processor. The switching logic is also configured to install a multicast router flood entry on the MC table at least partially in response to detecting that at least one multicast router is communicatively coupled to a port of the system, and receive at least one multicast packet at the switching processor. Moreover, the switching logic is configured to send the at least one multicast packet to a received multicast packet destination at least partially in response to determining the received multicast packet destination based at least in part on the multicast router flood entry.