Multi-Channel Delta-Sigma ADC for Low-Mismatch Sampling
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Solution Overview
Problem
Conventional data acquisition systems require multiple sample/hold blocks or ADCs for multiple channels, which are sensitive to high-frequency noise and lead to increased power consumption, die area, and cost, along with potential mismatches between channels.
Innovation Solution
A multi-channel analog to digital converter (ADC) design that includes multiple input channels, a sampling circuit, an integrator, and a feedback circuit, allowing for interleaved conversion of analog signals to digital signals using a first-order delta-sigma modulator, with switches and integrating capacitors configured to reduce channel mismatch and noise sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple sample/hold blocks are employed for multiple input channels, then simultaneous sampling of multiple analog signals is achieved, but the system becomes sensitive to high frequency noises and requires more components
Solution Approach 1:
The patent merges multiple sample/hold functions into a single shared sample/hold block that serves all input channels. The multiplexer selectively connects different input channels to this single sample/hold block in sequence, eliminating the need for multiple separate sample/hold blocks while maintaining simultaneous sampling capability through interleaved conversion.
Solution Approach 2:
The patent segments the conversion process into multiple phases, with each phase handling a different input channel. The multiplexer switches between channels in synchronization with the integrator's operation, allowing sequential processing of multiple channels through a single ADC core, thereby reducing component count while preserving multi-channel functionality.
2Reliability
If multiple individual ADCs are employed for each input channel, then each channel has dedicated conversion capability, but power consumption, die area and cost increase
Solution Approach 1:
The patent makes a single ADC core universal by using it to service multiple input channels in sequence. The shared integrator and quantizer are controlled by the multiplexer to process different channels at different times, allowing one ADC to perform the function of multiple ADCs while consuming only one ADC's worth of power.
Solution Approach 2:
The patent combines multiple ADC functions into a single shared ADC core. The multiplexer, integrator, and quantizer are shared resources that serve all input channels sequentially, eliminating the need for multiple separate ADC circuits and thereby reducing power consumption, die area, and cost.
3Reliability
If multiple individual ADCs are employed for each input channel, then each channel can be converted independently, but mismatch among multiple input channels occurs
Solution Approach 1:
The patent merges the conversion function into a single shared ADC core that all channels use. Since the same integrator and quantizer process all channels, component variations and mismatches are eliminated. The multiplexer ensures that each channel is processed by the identical conversion path, guaranteeing consistency across channels.
4Use of energy by stationary object
If a single ADC is used for multiple channels sequentially, then power consumption and die area are reduced, but conversion time for each channel increases
Solution Approach 1:
The patent employs periodic action through the multiplexer, which rapidly switches between input channels in a cyclic manner. This allows the single ADC to service multiple channels in sequence, reducing power and area while maintaining acceptable conversion rates through high-speed switching and interleaved processing.
Solution Approach 2:
The patent maintains continuous useful action by keeping the ADC core actively converting throughout the measurement period. Rather than idle between channels, the integrator continuously integrates signals and the multiplexer continuously switches between channels, maximizing the utilization of the single ADC resource.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient, synchronized conversion of multiple analog signals to digital signals with reduced power consumption and cost, while minimizing channel mismatches and noise sensitivity, improving overall system efficiency and reducing the need for multiple sample/hold blocks or ADCs.
Implementation Method 1
The integrator receives the sampled analog signal and a feedback signal and integrates a superposition of the sampled analog signal and the feedback signal
Data Source
AI summary
An analog to digital converter (ADC) converts an analog signal to a digital signal. The ADC includes an input channel, a sampling circuit coupled to the input channel, an integrator coupled to the sampling circuit, and a feedback circuit coupled to the integrator. The input channel receives the analog signal. The sampling circuit samples the analog signal. The integrator receives the sampled analog signal and a feedback signal and integrates a superposition of the sampled analog signal and the feedback signal. The feedback circuit generates the digital signal according to an output of the integrator and sends the feedback signal indicative of the digital signal to the integrator.