Hierarchical Multi-Channel Delay Locked Loop for Faster Locking
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Solution Overview
Problem
Conventional multi-channel delay locked loops consume excessive power and circuit area due to independent operation of delay locked loops for each channel, and require a long time to achieve locking across all channels.
Innovation Solution
A multi-channel delay locked loop configuration that includes a global delay locked loop to initiate and complete the locking operation, followed by local delay locked loops using a global delay control signal to initialize and maintain channel clock signals, reducing power consumption and circuit area while speeding up the locking process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If independent delay locked loops are used for each channel, then locking operation can be performed for each channel, but power consumption and circuit area are increased
Solution Approach 1:
The system is divided into a global delay locked loop that performs initial locking and multiple local delay locked loops that perform channel-specific adjustments. This segmentation allows the global DLL to be powered down after initial locking while local DLLs handle individual channels, reducing overall power consumption while maintaining reliable locking operations for each channel.
Solution Approach 2:
The global delay locked loop provides a universal delay control signal that is initially applied to all channels. After locking is achieved, this global control signal can be distributed to multiple local DLLs, allowing a single locking mechanism to serve multiple channels and reduce the need for separate full-function DLLs in each channel.
2Reliability
If independent delay locked loops are used for each channel, then locking operation can be performed for each channel, but circuit area is increased
Solution Approach 1:
The system architecture segments the delay locked loop functionality into global and local components. The global DLL handles the common locking function for all channels, while local DLLs handle channel-specific adjustments. This segmentation reduces the total circuit area by eliminating redundant components that would exist if fully independent DLLs were used for each channel.
Solution Approach 2:
The global delay locked loop merges the common locking functionality for all channels into a single circuit block. By combining the phase comparators, delay lines, and controllers that would otherwise be replicated in each channel's independent DLL, the circuit area is significantly reduced while maintaining the ability to perform locking operations across multiple channels.
3Reliability
If independent delay locked loops are used for each channel, then locking operation can be performed for each channel, but locking time is increased
Solution Approach 1:
The global delay locked loop performs preliminary locking action for all channels simultaneously before local DLLs perform channel-specific adjustments. This preliminary action establishes a common reference point for all channels, allowing local DLLs to converge much faster than if they had to perform complete locking independently, thereby reducing total locking time while ensuring reliable locking for each channel.
Data Source
AI summary
A multi-channel delay locked loop includes a global delay locked loop and a plurality of local delay locked loops. The global delay locked loop is configured to lock an input clock signal and output a global delay control signal corresponding to a delay amount of the input clock signal during a locking operation. Each of the plurality of local delay locked loops is configured to output a channel clock signal by locking the input clock signal, and initialize the delay amount of the input clock signal according to the global delay control signal.