Multichannel Digital Predistortion With Shared Feedback Link
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Solution Overview
Problem
In massive MIMO wireless communication systems, conventional digital predistortion methods require multiple feedback links and processors for each transmit channel, leading to increased costs and complexity, and lower processing efficiency, which affects system performance.
Innovation Solution
A digital predistortion processing method and apparatus that shares one feedback link and one digital predistortion processor across multiple transmit channels by performing deprecoding processing, improving output linearity and efficiency of power amplifiers while reducing implementation costs and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional digital predistortion apparatus is used with separate feedback links and processors for each transmit channel, then output linearity and efficiency of power amplifier is improved, but implementation costs and device complexity are increased dramatically
Solution Approach 1:
The patent merges multiple feedback links into a single shared feedback link and consolidates multiple digital predistortion processors into one shared processor. The feedback signals from N transmit channels are combined through a combiner, and the single predistortion processor processes all channels sequentially, eliminating the need for separate feedback links and processors for each channel while maintaining predistortion functionality.
Solution Approach 2:
The single digital predistortion processor is designed to handle multiple transmit channels universally by receiving feedback signals from all channels, performing predistortion processing, and outputting corrected signals that can be applied to any of the N channels. This multi-functional processor replaces multiple dedicated processors, reducing device complexity while maintaining output linearity across all channels.
2Device complexity
If digital predistortion training and processing are performed on multiple channels by turns with shared processors, then device complexity is reduced, but digital predistortion processing efficiency deteriorates
Solution Approach 1:
The patent implements continuous predistortion processing by having the single digital predistortion processor operate without interruption across all N channels. The processor receives feedback signals continuously from the combiner, processes them in real-time, and outputs corrected signals that are applied continuously to the transmit channels, eliminating idle time and maintaining high processing efficiency despite using shared resources.
3Device complexity
If quantities of digital predistortion processors and feedback links are decreased to reduce costs, then device complexity is reduced, but calibration implementation requirement cannot be met
Solution Approach 1:
The patent implements a feedback mechanism where the single digital predistortion processor receives feedback signals from all N transmit channels through the combiner, processes these signals to determine predistortion parameters, and adjusts its processing accordingly. This feedback loop enables the system to meet calibration requirements by continuously monitoring and adjusting predistortion settings based on actual channel conditions, despite using fewer processors and feedback links.
Data Source
AI summary
This application relates to the field of communications technologies, and in particular, to a digital predistortion processing method and apparatus. This application provides a digital predistortion processing method and apparatus. Digital predistortion processing of a multichannel power amplifier is supported through deprecoding processing by using one feedback link and one digital predistortion processor. In addition, after being amplified by a power amplifier, a precoded signal is fed back to the feedback link for predistortion parameter calculation, to improve quality of a transmit signal. The digital predistortion processing method and apparatus that are provided in embodiments of this application are intended to improve output linearity and efficiency of a multi-transmit-channel power amplifier while reducing implementation costs and complexity of a transmit device, and further improve overall system performance.