Multi-Channel Sampling Frequency Conversion With Shared Phase Reference

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Solution Overview

Problem

Existing sampling frequency conversion apparatuses face challenges in achieving phase synchronization across multiple channels due to differences in processing time delays and cable lengths, limiting their flexibility in handling multi-channel audio signals with varying numbers of channels.

Innovation Solution

A sampling frequency conversion apparatus that includes a processor to detect phase information from input digital signals and dynamically assign phase-synchronized operations across sampling frequency conversion circuits, allowing flexible reconfiguration based on setting information to match the number of input channels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If sampling frequency conversion is performed using separate SRC circuits for each channel, then sampling frequency conversion can be performed on multi-channel signals, but phase synchronization between channels deteriorates due to differences in processing time delays

Engineering Contradiction:
Improvemulti-channel signal processing capabilityVSAvoidphase synchronization accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent merges the phase reference function into a common resource shared by all channels. A single phase detector detects phase information from a reference clock signal, and this detected phase information is supplied to all SRC circuits as a common phase reference. This merging approach ensures that all channels use the same phase reference point, thereby achieving phase synchronization across multiple channels while maintaining the ability to process different multi-channel signal formats.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces an intermediary phase detection mechanism that mediates between the clock signals and the SRC circuits. Instead of each SRC circuit independently processing phase information, a dedicated phase detector acts as an intermediary that extracts phase information from the reference clock and distributes it to all channels. This intermediary approach eliminates phase synchronization errors caused by independent processing while preserving multi-channel processing capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the number of channels is fixed in the SRC circuit configuration, then the circuit design is simplified, but adaptability to various multi-channel formats (5.1 ch, 7.1 ch, etc.) deteriorates

Engineering Contradiction:
Improvecircuit configuration simplicityVSAvoidcompatibility with various channel numbers
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements a universal phase synchronization architecture that can handle various multi-channel formats (5.1 ch, 7.1 ch, and other channel configurations) using the same basic circuit structure. The system uses a common phase detector and common phase reference that works independently of the number of channels. This universal approach allows the SRC circuit to adapt to different channel configurations without requiring complex reconfiguration, thereby maintaining circuit simplicity while achieving high adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent segments the phase synchronization function from the channel-specific processing functions. The phase detection and phase reference generation are separated as independent common modules, while the SRC circuits for each channel can be independently configured. This segmentation allows the system to maintain a simple, fixed core architecture for phase synchronization while allowing flexible adaptation to different channel numbers through configuration rather than structural changes.

Inventive Principle:
Principle #1Segmentation

3Productivity

If processing time delays differ between channels, then individual channel processing can be optimized, but sound localization (phase, balance) discordance worsens

Engineering Contradiction:
Improvechannel processing efficiencyVSAvoidsound localization accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by detecting phase information from the reference clock signal before it is distributed to the various channel processing paths. This pre-detection ensures that all channels start with the same phase reference point, compensating for subsequent differences in processing time delays. The phase information is established in advance and maintained as a common reference throughout the processing chain, ensuring that sound localization remains accurate even when individual channel processing times differ.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7738615B2Sampling frequency conversion apparatus and signal switching apparatus
Publication Date: 2010.06.15 SONY GROUP CORP
  • US7738615B2 patent drawing
  • US7738615B2 patent drawing
  • US7738615B2 patent drawing

AI summary

A sampling frequency conversion apparatus having sampling frequency conversion circuits for a plurality of channels includes a detector detecting phase information of digital signals inputted to the conversion circuit for each channel, and an input section inputting setting information for the conversion circuits for two or more channels to be phase-synchronized. The apparatus further includes a phase information supplier supplying the phase information for the conversion circuit for a specific channel designated by the setting information inputted into the input section to the conversion circuits for the remaining channels of those for two or more channels other than the conversion circuit for the specific channel, and a sampling frequency converter performing sampling frequency conversion on the phase information of the conversion circuits for the remaining channels in synchronization with the phase information for the specific channel supplied from the phase information supplier.