Multi-Channel Thin Film Transistor for OLED Display Yield
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Solution Overview
Problem
In the manufacturing of oxide thin film transistors for OLED displays, the formation of short circuits during the etching process leads to defect pixels due to incomplete active layers and exposed gate lines, resulting in reduced product yield and lifespan.
Innovation Solution
A thin film transistor design featuring multiple sub-switches with via holes in the etching barrier layer allows for independent control of each sub-switch, enabling continued operation even if one sub-switch fails, thus preventing complete pixel failure and increasing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an etching barrier layer is added to protect the active layer during etching, then the active layer is protected from damage, but the gate insulating layer may still be etched together with the exposed gate line, causing short circuits
Solution Approach 1:
The source and drain electrodes are divided into multiple sub-electrodes (first sub-source electrode, second sub-source electrode, first sub-drain electrode, second sub-drain electrode), forming multiple independent conduction channels. This segmentation allows that if one channel experiences a short circuit, other channels can still function, thereby improving overall device reliability and reducing the impact of localized defects.
Solution Approach 2:
The design anticipates potential short circuit defects by creating redundant conduction paths through multiple sub-electrodes. This prior cushioning approach ensures that even if the etching process causes gate line exposure in certain areas, the device maintains functionality through alternative channels, preventing complete pixel failure.
2Reliability
If a short circuit occurs in a TFT switch, then the pixel becomes a defect pixel, but cutting off the source signal input end creates a dark pixel defect
Solution Approach 1:
By segmenting the electrodes into multiple sub-electrodes, the invention creates independent conduction channels that can be selectively managed. When a short circuit is detected in one channel, only the affected sub-electrode connection can be modified, while other channels continue to function, avoiding the need to cut off the entire source signal and prevent dark pixel defects.
Solution Approach 2:
The invention changes the electrical connection parameters by creating multiple parallel conduction paths with different resistance characteristics. This allows for flexible adjustment and isolation of defective channels without completely disrupting the pixel's electrical operation, thereby eliminating short circuit defects while maintaining normal pixel function.
3Productivity
If multiple defect pixels are generated on a display panel, then the panel cannot be normally used and must be disposed as scrap
Solution Approach 1:
The segmentation of electrodes into multiple sub-electrodes creates redundant conduction channels that provide fault tolerance. This allows the display panel to maintain functionality even when some channels experience defects during manufacturing, significantly improving product yield by enabling the use of panels that would otherwise be discarded as scrap.
Solution Approach 2:
The multi-channel design provides prior cushioning against manufacturing defects by ensuring that no single point of failure can completely disable a pixel. This redundancy cushions the system against the accumulation of defect pixels, allowing panels with minor defects to still meet functional requirements and be sold as usable products.
Data Source
AI summary
The present disclosure discloses a thin film transistor comprising: an active layer; an etching barrier layer arranged on the active layer and formed with a plurality of via holes therein; and a source electrode and a drain electrode arranged on the etching barrier layer, wherein the source electrode comprises at least two sub source electrodes and the drain electrode comprises at least two sub drain electrodes; and the sub source electrodes and the sub drain electrodes constitute at least two parallel sub-switches, each of which comprises a sub source electrode and a sub drain electrode, and the sub source electrode and the sub drain electrode are electrically connected to the active layer through the via holes in the etching barrier layer, respectively. The present disclosure further discloses a method of manufacturing a thin film transistor, an array substrate and a display apparatus. The present disclosure employs a multi-channel design with which the DGS problem due to an incomplete active layer is solved by using a plurality of parallel sub-switches, ensuring the normal operation of the pixel and thus increasing yield and useful life of product.