Multi-Channel Transceiver Clocking for Mixed SSCG Profiles
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Solution Overview
Problem
Conventional multi-channel transceivers are limited by a single spread spectrum clock generator, which cannot generate various SSCG profiles to support different data rates, leading to reduced sampling time margin and impaired performance due to clock frequency deviations.
Innovation Solution
A multi-channel transceiver utilizing a single phase-locked loop circuit to generate multiple clock signal sets with different frequencies, allowing for the creation of spread spectrum clock signals with various SSCG profiles across channels, and corresponding phase adjusting circuits to produce accurate sampling clocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single spread spectrum clock generator is used to generate clock signals for all channels, then the device complexity is reduced, but the adaptability to support different data rates with various SSCG profiles is limited
Solution Approach 1:
The patent divides the single clock generator function into multiple independent spread spectrum clock generators, with each generator dedicated to a specific channel. This segmentation allows each generator to be independently configured with appropriate SSCG profiles for different data rates, thereby resolving the contradiction between device complexity and adaptability.
2Object-affected harmful factors
If spread spectrum clocking frequency deviation is applied to reduce EMI spectral density, then electromagnetic interference is reduced, but the sampling time margin is reduced and performance is impaired
Solution Approach 1:
The patent applies different SSCG profiles with different frequency deviation characteristics to different channels based on their specific data rates and requirements. This local quality approach allows optimization of EMI reduction for each channel while maintaining adequate sampling time margin through appropriate profile selection, rather than applying a uniform frequency deviation to all channels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the generation of spread spectrum clock signals with diverse SSCG profiles, enhancing data accuracy and performance by maintaining accurate sampling clocks across different data rates, thereby improving the transceiver's operational efficiency.
Implementation Method 1
a phase-locked loop circuit generates a first clock signal set and a second clock signal set, wherein the first clock signal set and the second clock signal set have different frequencies
Data Source
AI summary
A multi-channel transceiver includes a phase-locked loop circuit, a first transmitting channel and a second transmitting channel. The phase-locked loop circuit generates a first clock signal set and a second clock signal set with different frequencies. The first transmitting channel includes a first phase adjusting circuit and a first transmitter. The first phase adjusting circuit receives the first clock signal set and generates a first spread spectrum clock signal with a first SSCG profile. According to the first spread spectrum clock signal, the first transmitter generates a first serial data. The second transmitting channel includes a second phase adjusting circuit and a second transmitter. The second phase adjusting circuit receives the second clock signal set and generates a second spread spectrum clock signal with a second SSCG profile. According to the second spread spectrum clock signal, the second transmitter generates a second serial data.