Multi-Chip Bus Communication Using Predefined Transfer Count
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Solution Overview
Problem
Existing data transfer methods in systems with multiple chips connected to a controller are inefficient due to the need for select chip terminate (SCT) packets, which degrade transfer performance.
Innovation Solution
A communication method that includes issuing 'Pre-defined Trans Num' packets to designate data size and release the data bus after transfer completion, eliminating the need for SCT packets, thereby enhancing transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SCT packets are used for data transfer completion, then data transfer can be completed, but transfer performance degrades due to the time spent on SCT issuance
Solution Approach 1:
The patent extracts and eliminates the SCT packet mechanism from the data transfer process. By removing the SCT issuance step entirely and replacing it with a predefined transfer count mechanism, the system achieves data transfer completion without the performance-degrading SCT overhead, directly resolving the contradiction between reliable completion and high-speed transfer.
Solution Approach 2:
The patent applies preliminary action by pre-defining the transfer count (Trans Num) before data transfer begins. The controller预先 specifies how many data packets should be transferred, and the system automatically completes the transfer after this predefined count is reached, eliminating the need for post-transfer SCT packets and improving performance while ensuring reliable completion.
2Reliability
If SCT packets are issued for each data transfer, then data bus can be released after transfer, but other chips cannot utilize the data bus sooner
Solution Approach 1:
The patent removes the SCT packet mechanism that causes data bus release delays. By eliminating the SCT issuance step, the data bus is released automatically after the predefined transfer count is completed, allowing other chips to utilize the bus immediately without waiting for SCT processing, thus reducing time loss while maintaining reliable bus release.
Solution Approach 2:
The patent enables continuous utilization of the data bus by other chips. Without the SCT packet bottleneck, the data bus transitions smoothly from one transfer to another, maximizing bus utilization and minimizing idle time between transfers, thereby reducing the loss of time while ensuring proper bus release.
3Ease of operation
If traditional communication protocol is used, then chips can be controlled, but transfer efficiency is reduced due to SCT overhead
Solution Approach 1:
The patent changes the communication protocol parameter from SCT-based completion to predefined Trans Num-based completion. By modifying this fundamental parameter, the system maintains ease of chip control through the controller's ability to specify transfer counts, while simultaneously improving transfer efficiency by eliminating the SCT overhead that previously reduced productivity.
Data Source
AI summary
According to one embodiment, a communication method is provided. The communication method includes transmitting a first packet including identification information on a first chip and designation of a first size from a controller to a first bus. The communication method includes enabling first data of the first size to be transferred from the first chip to a second bus in response to the first packet being received by the first chip. The communication method includes releasing the second bus after the transfer of the first data is completed.