Multi-Chip Clock Synchronization Using Low-Frequency Reference Clocks
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Solution Overview
Problem
Existing multi-chip clock synchronization methods increase input/output operating frequency and power consumption due to shared oscillation frequencies, necessitating a solution to reduce these costs and consumption.
Innovation Solution
A multi-chip clock synchronization device that supplies a reference clock of a low frequency to each chip and multiplies it by N times to generate a target clock, synchronizing clocks across multiple chips while minimizing frequency and power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple chips share a common oscillation source (external or master chip), then clock synchronization is achieved, but input/output operating frequency and power consumption increase
Solution Approach 1:
The patent divides the clock generation function into multiple independent segments, with each chip having its own local oscillator and frequency multiplication circuit. This segmentation eliminates the need for a shared high-frequency oscillation source, allowing each chip to operate independently at lower frequencies while maintaining synchronization through the generated target clock signals.
2Reliability
If multiple chips share a common oscillation source, then clock synchronization is achieved, but input/output operating frequency increases
Solution Approach 1:
The patent changes the frequency parameter by using frequency multiplication circuits that take low-frequency reference clocks from individual oscillators and multiply them by a factor N to generate the required high-frequency target clock. This allows the system to use low-frequency oscillation sources while achieving high-frequency operation through multiplication, thereby reducing input/output operating frequency requirements.
3Reliability
If external oscillation elements are used for clock generation, then clock synchronization is achieved, but cost increases
Solution Approach 1:
The patent replaces expensive external oscillation elements with integrated oscillator circuits that can be manufactured directly on the chips using standard semiconductor fabrication processes. This substitution significantly reduces component costs and simplifies manufacturing, as the oscillation function is embedded within each chip rather than requiring separate external components.
Data Source
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AI summary
The present disclosure relates to a multi-chip clock synchronization device and a method capable of reducing an operating frequency and power consumption when a plurality of chips share clocks for multi-chip clock synchronization, which may include a reference clock supply unit connected to a plurality of chips and supplying a reference clock of a first frequency to each chip and a target clock generation unit generating a target clock of a second frequency based on the reference clock of the first frequency, wherein the reference clock supply unit may generate the reference clock of the first frequency which is N times lower than the second frequency of the target clock to supply the generated reference clock to each chip, and the target clock generation unit may multiply the first frequency of the reference clock by N times when the reference clock of the first frequency is input to generate the target clock of the second frequency.