Multichip Coherence via Request Serialization in Parallel NAND
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Solution Overview
Problem
In NAND memory systems with multiple controllers, maintaining data coherence and preventing 'deadly embrace' scenarios where overlapping memory access ranges cause conflicts is challenging, especially in side-by-side configurations where simultaneous access to the same memory range can lead to coherency issues and performance delays.
Innovation Solution
Implementing a method where one controller acts as the primary and the other as the secondary, with the primary controller serializing requests from both to generate a synchronized request, ensuring both chips receive the same sequence of requests, thereby resolving coherency problems and preventing deadly embrace scenarios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple controllers access memory devices simultaneously in a side-by-side configuration, then productivity and data transfer rate are improved, but data coherence and system reliability deteriorate due to overlapping address ranges and deadly embrace scenarios
Solution Approach 1:
A serialization controller is introduced as an intermediary component that receives memory access requests from multiple controllers, serializes them into a unified sequence, and distributes them to memory devices. This mediator prevents coherence issues by ensuring that even though multiple controllers operate in parallel, their requests are serialized before execution, eliminating overlapping address range conflicts and deadly embrace scenarios while maintaining high productivity.
2Productivity
If a single die processes only one I/O operation at a time, then device complexity is reduced, but productivity is limited due to sequential processing
Solution Approach 1:
The system segments the control function by separating the serialization control logic from individual memory device controllers. Each controller can independently generate I/O requests without complex coordination, while the dedicated serialization controller handles the complexity of request ordering and coherence management. This segmentation allows multiple controllers to operate in parallel with reduced individual complexity while achieving high aggregate throughput.
3Ease of operation
If controllers use independent memory access without serialization, then ease of operation is improved, but harmful factors increase due to deadly embrace and coherency conflicts
Solution Approach 1:
The serialization controller serves as an intermediary that transparently handles request serialization between independently operating controllers and memory devices. Controllers can operate with simple independent logic, generating requests without complex coordination protocols. The serialization intermediary automatically prevents deadly embrace conflicts by ensuring requests are processed in a serialized manner, thus maintaining ease of operation while eliminating harmful conflicts.
Data Source
AI summary
A method for maintaining coherence for memory storage devices comprising a plurality of controllers in a side-by-side configuration. The method includes generating, by a first controller of the plurality of controllers, a first plurality of requests to access a first plurality of memory ranges; receiving, by the first controller from a second controller of the plurality of controllers, a second plurality of requests to access a second plurality of memory ranges; and serializing, by the first controller, the first plurality of requests and the second plurality of requests to generate a serialized request.