Multi-chip Package Diamond Insulation Layer

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Solution Overview

Problem

Existing semiconductor packages face challenges with heat dissipation, complex fabrication processes, and electrical shorts due to the use of epoxy mold compounds and insulation substrates like DBC and IMS, which are costly or have poor thermal and insulation characteristics.

Innovation Solution

A multi-chip package design featuring a lead frame or heat sink with an insulation layer, such as a diamond layer, to electrically isolate semiconductor chips and facilitate heat release, eliminating the need for expensive insulation substrates like DBC or IMS, and using encapsulation materials to ensure effective thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If EMC is used to encapsulate semiconductor chips on a lead frame, then electrical insulation is achieved, but heat dissipation capability deteriorates

Engineering Contradiction:
Improveelectrical insulationVSAvoidheat dissipation
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

An insulation layer made of diamond-like carbon (DLC) or similar material is introduced as an intermediary between the semiconductor chip and the lead frame. This intermediate layer provides excellent electrical insulation while maintaining high thermal conductivity, thus resolving the contradiction between electrical insulation and heat dissipation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the material parameters of the insulation layer by using diamond-like carbon (DLC) or other advanced materials that possess both high electrical resistance and high thermal conductivity. This parameter change allows simultaneous achievement of electrical insulation and effective heat dissipation.

Inventive Principle:
Principle #35Parameter changes

2Temperature

If DBC substrate is used for insulation, then heat release characteristic is improved, but manufacturing cost increases

Engineering Contradiction:
Improveheat release characteristicVSAvoidmanufacturing cost
Core Design Contradiction:
TemperatureVSEase of manufacture

Solution Approach 1:

The patent replaces expensive DBC (Direct Bonded Copper) substrates with a more cost-effective lead frame structure combined with a thin insulation layer. This substitution maintains thermal performance while significantly reducing manufacturing costs by using simpler, more readily available materials.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent employs composite material structures where a lead frame is combined with a thin insulation layer (such as DLC coating) to achieve the thermal and electrical performance previously requiring expensive DBC substrates. This composite approach provides cost-effective thermal management.

Inventive Principle:
Principle #40Composite materials

3Adaptability or versatility

If lead frame is used to mount multiple semiconductor chips, then device integration is improved, but electrical insulation between chips deteriorates

Engineering Contradiction:
Improvedevice integrationVSAvoidelectrical insulation between chips
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

An insulation layer is introduced as an intermediary between the semiconductor chips and the conductive lead frame. This intermediate layer prevents electrical shorts between multiple chips mounted on the same lead frame while maintaining electrical connectivity where needed, thus enabling high device integration with reliable electrical insulation.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If IMS substrate is used for insulation, then fabrication cost is reduced, but thermal and electrical insulation characteristics deteriorate

Engineering Contradiction:
Improvefabrication costVSAvoidthermal characteristic
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent changes the material parameters by using diamond-like carbon (DLC) or advanced insulation materials with high thermal conductivity. This parameter change allows the insulation layer to provide both cost-effectiveness and superior thermal characteristics, outperforming conventional IMS substrates.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a cost-effective multi-chip package with high electrical resistance and low thermal resistance, enabling efficient heat dissipation and preventing electrical shorts between semiconductor chips, thus enhancing the reliability and performance of power devices.

Implementation Method 1

a diamond-like carbon (DLC) insulation layer are disposed between a semiconductor chip and a lead frame

Methodology Applied
Scientific EffectElectrical insulation: Electrical Resistance

Implementation Method 2

the DLC insulation layer has high electrical resistance and low thermal resistance

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

an encapsulation material encapsulating the surface of the lead frame, the one or more semiconductor chips and the substrate

Methodology Applied
Scientific EffectEncapsulation:

Data Source

PatentUS7936054B2Multi-chip package
Publication Date: 2011.05.03 SEMICON COMPONENTS IND LLC
  • US7936054B2 patent drawing
  • US7936054B2 patent drawing
  • US7936054B2 patent drawing

AI summary

A semiconductor package is disclosed. Particularly, a multi-chip package is disclosed, which can stably maintain insulation between a plurality of semiconductor chips and effectively release heat to the outside. The semiconductor package includes an insulation layer including a diamond layer formed by a chemical vapor deposition method between a lead frame or a heat sink and the semiconductor chips disposed thereon.