Multi-chip Structure with Integrated Thermal-Conductive Layer
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Solution Overview
Problem
Conventional multi-chip package structures face challenges in heat dissipation efficiency due to bulky designs and low thermal conductivity materials, leading to increased temperatures within the package.
Innovation Solution
A multi-chip structure with a thermal-conductive layer positioned between chips, featuring electrical connection members and dielectric areas for insulation, which enhances heat dissipation while maintaining a compact form factor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a metal sheet is disposed between the chip and the substrate for heat dissipation, then heat transfer capability is improved, but the package volume increases
Solution Approach 1:
The patent combines the heat dissipation function and electrical connection function into a single integrated structure. The thermal-conductive layer is formed simultaneously with the electrical connection bumps, merging what were previously separate components (metal sheet for heat dissipation and bumps for electrical connection) into one unified layer that performs both functions, thereby reducing package volume while maintaining heat transfer capability
Solution Approach 2:
The thermal-conductive layer serves multiple functions simultaneously: it provides heat dissipation through its high thermal conductivity, establishes electrical connections through integrated bumps, and provides structural support. This multi-functionality eliminates the need for separate heat dissipation components, reducing overall package volume
2Temperature
If a heat spreader is disposed between the back surfaces of two chips for heat dissipation, then heat transfer capability is improved, but the package volume increases
Solution Approach 1:
The patent applies the same merging principle here: the thermal-conductive layer is integrated with the electrical connection bumps, combining heat dissipation and electrical connection functions in one structure. This eliminates the need for a separate heat spreader between chips, reducing package volume while maintaining effective heat transfer
3Reliability
If an underfill layer with low thermal conductivity is used for chip connection, then electrical connection is achieved, but heat dissipation capability deteriorates
Solution Approach 1:
The patent uses a composite structure where the thermal-conductive layer combines materials with high thermal conductivity and high electrical conductivity. This composite approach allows the same layer to provide both reliable electrical connections and effective heat dissipation, unlike the underfill layer which has low thermal conductivity
Solution Approach 2:
The thermal-conductive layer with integrated bumps provides multiple functions simultaneously: electrical connection, heat dissipation, and structural support. This multi-functionality replaces the underfill layer's limited electrical connection function with a comprehensive solution that also addresses heat dissipation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively manages heat dissipation, maintaining operating temperatures within a prescribed range and reducing package volume, with the added benefit of a streamlined production process through simultaneous fabrication of thermal and electrical components.
Implementation Method 1
the first thermal-conductive layer surrounds the first signal bumps and is disposed between the first surface and the second surface
Implementation Method 2
the first signal bumps are electrically insulated from the first thermal-conductive layer by the first dielectric areas
Data Source
AI summary
A multi-chip structure at least including a first chip, a second chip and a first thermal-conductive layer is provided. The first chip has a first surface and a plurality of first pads disposed on the first surface. The second chip has a second surface facing the first surface and a plurality of second pads disposed on the second surface. The first thermal-conductive layer is disposed between the first chip and the second chip and includes a thermal-conductive area, a plurality of first electrical connection members and a plurality of first dielectric areas. The first electrical connection members disposed in the first thermal-conductive layer are used to electrically connect the first surface and the second surface. The first dielectric areas surround and insulate the first electrical connection members from the thermal-conductive area.