Multi-chip Module Silicon Interposer Via Holes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional multi-chip modules require large clearances between chips, leading to elongated wiring lengths that hinder high-speed data transmission and necessitate larger chip sizes and increased costs due to specialized manufacturing equipment for fine wiring boards.
Innovation Solution
A multi-chip module design utilizing a silicon interposer with fine pitch wiring patterns and via holes on a build-up board, allowing for shorter wiring lengths and electrical connections beyond the wiring patterns, enabling efficient high-speed data transmission and reducing the need for specialized equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If large clearance is provided between chips to satisfy wiring specification of ceramic or build-up board, then wiring layout is easier, but wiring length is elongated and data transmission speed decreases
Solution Approach 1:
The patent transitions from planar wiring on the board surface to three-dimensional vertical wiring through via holes. The wiring board includes conductive vias that extend vertically through the board thickness, enabling signals to travel in the Z-direction rather than being constrained to the XY-plane. This dimensional change allows chips to be positioned closer together horizontally while maintaining adequate wiring separation vertically, thus reducing wiring length and improving data transmission speed without compromising manufacturability.
Solution Approach 2:
The wiring board acts as an intermediary structure between adjacent chips, providing vertical conductive paths through via holes. Instead of requiring large horizontal clearances between chips for wiring routing, the wiring board mediates the connection by routing signals vertically through its thickness. This intermediary structure enables dense chip packaging while maintaining signal integrity and transmission speed.
2Ease of operation
If wiring length is elongated to provide large clearance between chips, then chip placement is simpler, but driver size must increase and LSI size becomes larger
Solution Approach 1:
By introducing vertical via holes through the wiring board, the patent enables chip interconnections in the Z-dimension. This allows chips to be placed closer together in the XY-plane without increasing wiring length, as the via holes provide direct vertical pathways. Consequently, the LSI can maintain a compact footprint while achieving proper chip-to-chip connections, reducing the overall device volume.
3Speed
If fine wiring build-up board is used to reduce clearance between chips, then data transmission speed improves, but manufacturing cost increases due to specialized equipment
Solution Approach 1:
The patent modifies the wiring board structure by incorporating via holes at specific intervals and positions, changing the physical parameters of the board design. This via-hole architecture enables fine-pitch chip spacing and high-speed signal transmission using conventional manufacturing processes, avoiding the need for expensive specialized fine-wiring equipment while achieving the desired performance improvements.
Data Source
AI summary
A multi-chip module includes: a board; a wiring board disposed on the board and including a wiring pattern; and a plurality of chips disposed on the wiring board. Each of the plurality of chips is connected with at least one of the other chips, and the plurality of chips and the board are electrically connected with each other via a portion other than the wiring pattern of the wiring board.