Multi-Chip Module With Through-Silicon Vias for High-Density Mounting

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Solution Overview

Problem

Conventional multichip modules face challenges in downsizing and lightening due to wide wiring lines and height restrictions, limiting the miniaturization and high-density mounting of electronic devices in applications like small satellites.

Innovation Solution

A multichip module configuration using stacked semiconductor substrates with through-silicon via wiring lines, allowing for miniaturized and high-density mounting without altering the overall substrate area, and utilizing room-temperature bonding to assemble the modules, which improves heat conduction and reduces the risk of surface mounting part damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If conventional substrate wiring lines are used with wide line width, then wiring can be provided, but substrate area increases preventing downsizing

Engineering Contradiction:
Improvesubstrate volumeVSAvoidsubstrate area
Core Design Contradiction:
Volume of moving objectVSArea of stationary object

Solution Approach 1:

The patent transitions from two-dimensional planar wiring to three-dimensional stacked wiring by forming wiring lines that extend in the thickness direction through the substrate. Multiple wiring layers are stacked vertically, allowing compact routing of signals without increasing the substrate's planar area, thus enabling downsizing while maintaining wiring functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The substrate wiring is segmented into multiple discrete wiring layers stacked in the thickness direction. Each wiring layer contains specific wiring lines routed independently, allowing complex interconnections to be achieved through vertical stacking rather than expanding planar area. This segmentation enables high-density integration without increasing substrate footprint.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple dies are stacked in height direction, then high density mounting is achieved, but height dimension is restricted

Engineering Contradiction:
Improvemounting densityVSAvoidmodule height
Core Design Contradiction:
ProductivityVSLength of stationary object

Solution Approach 1:

The patent utilizes the thickness direction of the substrate as an additional dimension for mounting surface mounting parts. Instead of only stacking dies vertically with height restrictions, the invention mounts parts on different layers within the substrate thickness, enabling high-density three-dimensional integration without excessive height increase. This approach achieves productivity improvement while controlling the height dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If conventional high-temperature bonding is used, then substrate bonding is achieved, but surface mounting parts may be damaged and heat conduction is poor

Engineering Contradiction:
Improvebonding strengthVSAvoidmounting part damage risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the bonding temperature parameter from conventional high-temperature processes to room-temperature bonding. This parameter change eliminates thermal damage risks to surface mounting parts while achieving sufficient bonding strength through room-temperature bonding techniques, thus improving reliability without introducing harmful thermal effects.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces thermal bonding mechanisms with mechanical or chemical bonding mechanisms that operate at room temperature. This substitution eliminates the need for high-temperature thermal fields that could damage sensitive mounting parts, while still achieving strong bonding through alternative physical or chemical mechanisms.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Ease of manufacture

If conventional resin or ceramic substrates are used, then substrate functions are provided, but heat conduction is poor limiting performance

Engineering Contradiction:
Improvesubstrate fabricationVSAvoidheat conduction performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent employs a composite substrate structure combining resin or ceramic base material with embedded high-thermal-conductivity materials such as metal layers or heat dissipation structures. This composite approach maintains the manufacturing advantages of resin/ceramic substrates while significantly improving heat conduction performance through the integrated thermal management materials.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent introduces intermediary heat dissipation structures such as metal heat sinks or thermally conductive interfaces between the active components and the substrate. These intermediary elements serve as thermal bridges, improving heat conduction from the mounting parts through the substrate without requiring the substrate material itself to have high thermal conductivity, thus maintaining ease of manufacture while enhancing thermal performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables significant downsizing and lightening of multichip modules while maintaining performance, allowing for high-density mounting and improved heat radiation, with no theoretical limit on the number of stacked layers, enhancing the functionality and performance of electronic devices.

Implementation Method 1

The plurality of semiconductor substrates are bonded to one another by a room-temperature bonding method

Methodology Applied
Scientific EffectRoom-temperature bonding: Adhesive

Implementation Method 2

the plurality of semiconductor substrates are stacked to form a multilayer structure... improved heat conduction and reduces the risk of surface mounting part damage

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Data Source

PatentEP3104410B1Multi-chip module, on-board computer, sensor interface substrate, and multi-chip module manufacturing method
Publication Date: 2022.12.07 MITSUBISHI HEAVY IND LTD
  • EP3104410B1 patent drawingFigure 1
  • EP3104410B1 patent drawingFigure 2A~2B
  • EP3104410B1 patent drawingFigure 3A~3B

AI summary

A multichip module includes a plurality of semiconductor substrates and a plurality of surface mounting parts. The plurality of semiconductor substrates each have a wiring line region which contains a wiring line to pierce from one of the surfaces to the other surface. A plurality of surface mounting parts are mounted on either of the plurality of surface mounting parts. The plurality of semiconductor substrates are stacked to form a multilayer structure. The first surface mounting part as at least one of the plurality of surface mounting parts is arranged in an inside region of the multilayer structure.