Multi-chip Multi-substrate Reconstitution Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing IC packaging solutions are limited in optimizing circuit layout density, cost, and performance due to their focus on single or multiple dies in a package substrate format, lacking flexibility in material selection and layer count customization.
Innovation Solution
A multi-chip and multi-substrate approach using reconstituted substrate panels/strips formed from individual 'known-good' substrates of varying materials and layer counts, allowing for customized packaging solutions optimized for specific applications by combining substrates with different characteristics within the same package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single substrate format is used for all IC packages, then manufacturing simplicity is maintained, but flexibility in material selection and layer count customization is lost
Solution Approach 1:
The patent divides the substrate system into multiple discrete substrate types, each optimized for specific circuit block requirements. Instead of using a single uniform substrate for all packages, the system segments substrates into different configurations (varying materials, layer counts, and structures) that can be selectively combined with different IC chips, thereby achieving customization without overwhelming complexity
Solution Approach 2:
Different regions or circuit blocks within a package can utilize substrates with locally optimized properties. The patent allows selection of substrates with specific materials and layer counts tailored to the requirements of particular circuit blocks, enabling local quality optimization while maintaining overall package functionality
2Productivity
If multiple IC dies are attached to a single package substrate, then system-in-a-package functionality is achieved, but circuit layout density optimization is limited
Solution Approach 1:
The patent segments the package into multiple substrate units, each potentially carrying one or more IC dies. This segmentation allows for optimized circuit layouts on each substrate without being constrained by a single large substrate, thereby improving circuit layout density while managing complexity through modular organization
Solution Approach 2:
The patent introduces multi-substrate stacking or arrangement in three-dimensional space, moving beyond traditional planar single-substrate layouts. By utilizing vertical stacking or multi-layer substrate arrangements, the system achieves higher circuit layout density without proportionally increasing planar complexity
3Reliability
If faulty substrates are discarded during testing, then reliability is maintained, but manufacturing efficiency is reduced
Solution Approach 1:
The patent performs substrate testing and identification of known-good substrates before final package assembly. By conducting preliminary testing and sorting substrates into verified good units in advance, the system ensures high reliability while improving assembly line efficiency, as only pre-validated substrates proceed to final packaging without re-testing delays
Data Source
AI summary
Embodiments for multi-chip and multi-substrate reconstitution based packaging are provided. Example packages are formed using substrates from a reconstitution. substrate panel or strip. The reconstitution substrate panel or strip may include known good substrates of same or different material types and/or same of different layer counts and sizes. As such, different combinations of reconstitution substrates and chips can be used within the same package, thereby allowing substrate customization according to semiconductor chip block(s) and types contained in the package.