Multichip Neural Network Processing With Shared Data Channels
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing neural network implementations face challenges in chip-level parallelization and synchronization of accelerating elements, leading to inefficiencies in data processing.
Innovation Solution
A multichip system with a broadcasting channel facilitates parallel operation by allocating data processing tasks across multiple chips, enabling partial data transmission and computation, and sharing results through a common channel for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If chip-level parallelization is implemented in neural network processing, then processing speed and productivity are improved, but synchronization complexity and device complexity increase
Solution Approach 1:
The patent divides the neural network processing system into multiple independent chips, where each chip processes a specific portion of the input data through segmented computation units. This segmentation enables parallel processing while maintaining independent operation of each chip, thus improving productivity without proportionally increasing synchronization complexity.
Solution Approach 2:
The patent designs a universal channel interface that can handle multiple types of data transmissions (input data, intermediate results, final outputs) between chips. This multi-functional channel design simplifies the synchronization mechanism by providing a standardized communication protocol, reducing the overall device complexity despite implementing chip-level parallelization.
2Productivity
If data is shared between multiple chips through a common channel, then parallel processing efficiency is improved, but data transmission overhead and device complexity increase
Solution Approach 1:
The patent merges the communication interfaces of multiple chips into a shared channel structure, allowing data to be transmitted between any chips through this common infrastructure. This consolidation reduces the total number of communication links required compared to point-to-point connections, thereby improving parallel processing efficiency while controlling the complexity of the transmission infrastructure.
3Productivity
If multiple chips process different parts of data simultaneously, then processing throughput is improved, but coordination overhead and device complexity increase
Solution Approach 1:
The patent implements a self-service coordination mechanism where each chip independently manages its own data processing tasks and automatically requests necessary data from other chips through the shared channel when needed. This decentralized coordination approach improves processing throughput by eliminating centralized control bottlenecks while keeping the coordination mechanism simple through standardized channel protocols.
Data Source
AI summary
A data processing method, a multichip system, and a non-transitory computer-readable medium for implementing a neuron network application are provided. The data processing method includes: allocating corresponding chips to process a corresponding part of a first stage data and a corresponding part of a second stage data; transmitting, by a first chip, a first part of the first stage data to a second chip through a channel; transmitting, by the second chip, a second part of the first stage data to the first chip through the channel; computing, by the first chip, the first stage data with a first part of weight values to obtain a first result, and computing, by the second chip, the first stage data with a second part of weight values to obtain a second result, where the first result and the second result are one of the second stage data.