Multi-Chip Package Thermal Dissipation Structure
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Solution Overview
Problem
Multi-chip packages face challenges in heat dissipation and power supply due to the size difference between semiconductor chips and package substrates, leading to inefficient heat transfer and insufficient power delivery.
Innovation Solution
A multi-chip package design incorporating an interposer chip with a thermal dissipation structure, including an insulating layer and thermal dissipation lines, to effectively transfer heat from a smaller first semiconductor chip to the interposer chip, and a power line to ensure sufficient power supply to a second semiconductor chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If a smaller semiconductor chip is mounted on an interposer chip to reduce electrical connection length, then the electrical connection length is reduced, but heat dissipation becomes insufficient
Solution Approach 1:
The patent introduces a thermal dissipation line that extends in a planar dimension across the interposer chip surface, transforming the heat transfer from a vertical point-contact problem to a distributed planar conduction system. This dimensional expansion allows heat to be conducted across a larger area of the interposer chip, effectively increasing the thermal dissipation capacity without increasing the vertical connection length.
Solution Approach 2:
The thermal dissipation line acts as an intermediary thermal conduction path between the active region of the semiconductor chip and the heat sink. This intermediate structure facilitates efficient heat transfer by providing a dedicated thermal pathway that is separate from the electrical connection structures, allowing heat to be conducted away from the active region through the interposer chip to external heat dissipation structures.
2Device complexity
If a small conductive bump is used to connect power pad of upper semiconductor chip to interposer chip, then the electrical connection is established, but sufficient power cannot be supplied
Solution Approach 1:
The power delivery system is segmented into multiple parallel conductive pathways (multiple conductive bumps) rather than relying on a single connection. This segmentation distributes the power current across multiple independent paths, increasing the total power carrying capacity while maintaining a relatively simple overall connection structure between the semiconductor chip and interposer chip.
Solution Approach 2:
Multiple conductive bumps are merged into a unified power delivery system that collectively supplies power to the semiconductor chip. By combining the power transmission function across multiple parallel conductive elements, the system achieves sufficient power supply capacity while keeping individual connection elements simple and manageable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables effective heat dissipation and sufficient power delivery to the second semiconductor chip, enhancing the performance and reliability of the multi-chip package.
Implementation Method 1
The thermal dissipation line may make contact with the interposer chip and the first semiconductor chip to form a thermal transfer path of the heat
Data Source
AI summary
A multi-chip package may include a package substrate, an interposer chip, a first semiconductor chip, a thermal dissipation structure and a second semiconductor chip. The interposer chip may be mounted on the package substrate. The first semiconductor chip may be mounted on the interposer chip. The first semiconductor chip may have a size smaller than that of the interposer chip. The thermal dissipation structure may be arranged on the interposer chip to surround the first semiconductor chip. The thermal dissipation structure may transfer heat in the first semiconductor chip to the interposer chip. The second semiconductor chip may be mounted on the first semiconductor chip. Thus, the heat in the first semiconductor chip may be effectively transferred to the interposer chip through the thermal dissipation line.