Interposer-Based Multichip Switch Fabric for Protocol Flexibility
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Solution Overview
Problem
High-throughput switch fabrics are typically implemented as large monolithic integrated circuits, leading to high manufacturing costs and complexity, as well as the need for replacement when protocols change, which is costly and inefficient.
Innovation Solution
A multichip module architecture comprising a transceiver die, protocol logic blocks die, and crossbar switch die interconnected via an interposer, allowing for flexible reconfiguration and reduced costs by enabling the use of smaller, more efficient dies that can be manufactured separately and assembled as needed, supporting multiple protocols and protocols changes without replacing the entire device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single monolithic integrated circuit is used for high-throughput switch fabric, then the circuit can be manufactured, but the manufacturing costs and complexity are relatively high
Solution Approach 1:
The patent divides the monolithic integrated circuit into multiple separate dies (transceiver die, crossbar switch die, protocol logic blocks die) that are mounted on an interposer substrate. This segmentation allows each die to be manufactured independently using optimized processes, reducing overall manufacturing complexity and cost while maintaining high-throughput performance.
2Adaptability or versatility
If a large monolithic integrated circuit is used, then high-throughput switching is achieved, but the circuit must be replaced when protocol changes occur, adding to costs
Solution Approach 1:
The patent creates a dynamically reconfigurable system where protocol logic blocks can be programmed and reconfigured via configuration data loaded into memory structures. This allows the switch fabric to adapt to different protocols without physical replacement of the entire circuit, reducing costs and improving versatility.
3Productivity
If a monolithic integrated circuit is used, then the circuit is complete, but design lead times are long and yield rates are reduced
Solution Approach 1:
By segmenting the circuit into multiple smaller dies that can be manufactured independently, the patent reduces design lead times for each individual die and improves yield rates. If one die has manufacturing defects, others can still be produced and used, reducing overall loss and accelerating time-to-market.
Data Source
AI summary
An embodiment of a multichip module is disclosed. For this embodiment of the multichip module, a transceiver die has transceivers. A crossbar switch die has at least one crossbar switch. A protocol logic blocks die has protocol logic blocks. The transceiver die, the crossbar switch die, and the protocol logic blocks die are all coupled to an interposer. The interposer interconnects the transceivers and the protocol logic blocks to one another and interconnects the protocol logic blocks and the at least one crossbar switch to one another.