Non-Intrusive Multicore Bus Debugging via Sliding Window Tracing

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Solution Overview

Problem

Debugging issues in multicore System on a Chip devices, particularly with DMA engines and bus transactions, is challenging due to the complexity of data transactions impacting multiple CPUs and requiring real-time debugging without halting any CPUs, making it difficult to identify correctness and performance issues related to data transfer deadlines and cache behavior.

Innovation Solution

The CP_Tracer module automatically collects bus transaction statistics within a sliding time window and exports them as hardware events, allowing for remote monitoring and analysis without special logic analyzers, enabling the identification of issues leading to missed deadlines through detailed statistics and event logging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional debugging methods are used to halt CPUs for analysis, then debugging accuracy is improved, but system productivity deteriorates due to operational interruption

Engineering Contradiction:
Improvedebugging accuracyVSAvoidsystem operation continuity
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The system performs preliminary actions by continuously collecting and buffering bus transaction data, hardware events, and software context information before any debugging analysis is needed. This pre-captured data is stored in memory with timestamps and correlation identifiers, allowing post-event analysis without requiring system halts or interrupts, thus maintaining productivity while enabling accurate retrospective debugging

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention creates a copy of the system's operational state by capturing bus transactions and hardware events through trace buffers and memory copies. Instead of analyzing the live system directly (which would require halts), the debug tooling analyzes copies of transaction data, hardware event logs, and software context that were replicated during normal operation, enabling accurate debugging without impacting system continuity

Inventive Principle:
Principle #26Copying

2Measurement precision

If comprehensive bus transaction monitoring is implemented to capture all system events, then measurement precision is improved, but device complexity increases due to additional hardware and software layers

Engineering Contradiction:
Improveevent detection capabilityVSAvoidsystem architecture complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The CP_Tracer module serves multiple functions: it monitors bus transactions, timestamps events, correlates hardware and software activities, and exports data for analysis. By consolidating these diverse debugging functions into a single multi-functional module, the system achieves comprehensive event detection without proportionally increasing complexity, as one component performs what would otherwise require multiple separate systems

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention introduces an intermediary layer (the CP_Tracer and associated trace buffers) between the bus transactions and the debug tooling. This intermediary captures and structures raw bus events into correlated, timestamped data streams that are easier to analyze, reducing the complexity of the analysis process while maintaining comprehensive monitoring capability. The intermediary translates complex raw bus signals into structured debuggable data

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If real-time debugging without CPU halts is implemented, then system productivity is maintained, but difficulty of detecting and measuring problems increases due to lack of direct observation

Engineering Contradiction:
Improvesystem operation continuityVSAvoidproblem detection difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The system implements feedback by continuously monitoring bus transactions and hardware events, correlating them with software context, and providing this correlated data back to the debug tooling. The timestamped event logs and trace buffers provide feedback about system state at specific moments, enabling remote analysis of real-time behavior without direct observation or CPU intervention, thus maintaining productivity while reducing detection difficulty

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The invention replaces the mechanical approach of direct CPU-based debugging (requiring halts and direct observation) with an electronic/data-based system. Instead of mechanically stopping CPUs to examine state, the system uses electronic trace buffers, memory copies, and data serialization to capture and transmit system state information, allowing remote measurement and analysis without physical or mechanical intervention in the running system

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8706937B2Method and system of debugging multicore bus transaction problems
Publication Date: 2014.04.22 TEXAS INSTRUMENTS INC
  • US8706937B2 patent drawing
  • US8706937B2 patent drawing
  • US8706937B2 patent drawing

AI summary

A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. Users are alerted to timing problems as they occur, and bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, or alternatively by external trigger events.