Multi-Core Computing Circuit Scheduling for Parallel Task Execution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Computational efficiency of computing circuits, particularly in intelligent driving chips, is low and difficult to meet practical requirements.
Innovation Solution
A multi-core computing circuit system with a primary controller that determines computing cores and generates configuration information for collaborative computation, enabling parallel and collaborative work among computing cores to efficiently complete computing tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single computing core is used, then device complexity is low, but computational efficiency is insufficient
Solution Approach 1:
The computing circuit is segmented into multiple independent computing cores (first computing core, second computing core, etc.), each capable of independently executing computing tasks. This segmentation enables parallel computation, thereby improving computational efficiency while maintaining manageable complexity through modular design
Solution Approach 2:
Multiple computing cores are designed with identical or similar functional capabilities, allowing any core to handle various types of computing tasks. This universality enables flexible task distribution and parallel processing, improving overall computational efficiency without requiring complex specialized hardware for each core
2Productivity
If multiple computing cores are used, then computational efficiency is improved, but device complexity increases
Solution Approach 1:
Multiple computing cores are merged into a single integrated computing circuit, sharing common resources such as memory interfaces and control logic. This merging approach enables parallel computation to improve efficiency while reducing overall device complexity by eliminating redundant components
Solution Approach 2:
A memory system acts as an intermediary between multiple computing cores and external data sources. This mediator manages data distribution and coordination among cores, enabling efficient parallel computation without requiring complex direct connections between each core and external resources
Data Source
AI summary
Disclosed are a computing system, a multi-core computing circuit-based computing result generation method, and a medium. The computing system includes a multi-core computing circuit and a primary controller. The primary controller is configured to determine a target computing task; determine at least two computing cores for participating in the target computing task from the multi-core computing circuit; and generate computing configuration information respectively corresponding to the at least two computing cores based on the target computing task. The at least two computing cores are configured to collaborate for computation based on the respective corresponding computing configuration information, to generate a target computing result corresponding to the target computing task.