Multi-Core Current Throttling for Peak and Inrush Suppression
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Solution Overview
Problem
Current power management techniques in multi-core systems are inadequate for suppressing peak and inrush currents, leading to potential damage to PCB components and system failures due to voltage droop, as traditional methods either increase hardware size and cost or incur latency.
Innovation Solution
A management circuit with a detection circuit and throttle signal generator that estimates total current consumption from activity signals and asserts or de-asserts throttle signals to processor cores based on calculated metrics to suppress peak and inrush currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple capacitances and inductances are added to suppress current, then current suppression effectiveness is improved, but hardware size, thermal consumption, and cost increase
Solution Approach 1:
The patent replaces the traditional mechanical/electrical approach of using physical capacitances and inductances with a software-based current suppression mechanism. The management circuit uses activity signals from processor cores to calculate total current consumption and generates throttle signals to suppress current peaks, eliminating the need for additional passive components on the PCB.
Solution Approach 2:
The system uses its own activity signals to monitor and control its current consumption. The management circuit receives activity signals from processor cores, calculates total current, and automatically generates throttle signals to suppress current when necessary, making the system self-regulating without external hardware intervention.
2Reliability
If software commands are used to decrease power supply and operating frequency, then current suppression is achieved, but latency increases and response time is slow
Solution Approach 1:
The management circuit continuously monitors activity signals from processor cores and calculates total current consumption in advance. When the calculated current approaches or exceeds the maximum threshold, the circuit proactively generates throttle signals to suppress current peaks before they cause damage, enabling fast response without software intervention delay.
Solution Approach 2:
The patent introduces a management circuit as an intermediary between processor cores and the power supply system. This circuit receives activity signals from cores, calculates current consumption, and generates throttle signals to control power delivery, acting as a real-time mediator that responds faster than software commands while providing more granular control than traditional hardware components.
3Object-affected harmful factors
If traditional current suppression methods are used, then hardware components can be protected, but the system becomes more complex and expensive
Solution Approach 1:
The management circuit performs multiple functions: it receives activity signals from processor cores, calculates total current consumption, determines when current suppression is needed, and generates appropriate throttle signals. This single circuit replaces what would traditionally require multiple passive components (capacitances and inductances), reducing overall system complexity while maintaining protection capabilities.
Data Source
AI summary
A management circuit is coupled to multiple processor cores for performing current suppression. The management circuit includes a detection circuit and a throttle signal generator. The detection circuit is operative to receive an activity signal from each processor core, and estimate a total current consumed by the plurality of processor cores based on activity signals. The activity signal indicates a current index proportional to current consumption of the processor core in a given time period. The throttle signal generator is operative to assert or de-assert throttle signals to the processor cores, one processor core at a time, based on one or more metrics calculated from the total current.