Multi-Core DAC Clock Selection for Broadband Frequency Coverage
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Solution Overview
Problem
Digital-to-analog conversion devices with multiple DAC cores face a common restricted frequency range when converting digital radio frequency signals to analog signals, which limits their output and cannot be effectively shifted by changing the clock frequency of all converters simultaneously.
Innovation Solution
The solution involves providing each DAC core with multiple clock signals of different frequencies, allowing each core to select an appropriate clock signal for digital-to-analog conversion, thereby individualizing the restricted frequency range and enabling the generation of broadband signals without gaps by combining outputs from multiple cores operating at different frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If all DAC cores are operated with the same clock frequency, then the device structure is simple and easy to control, but the output signals all have the same restricted frequency range which limits the overall frequency coverage
Solution Approach 1:
The patent divides the clock signal distribution into separate paths for each DAC core, allowing each core to receive and operate with different clock frequencies. This segmentation enables each DAC core to have an independent frequency range, thereby expanding the overall frequency coverage of the device without requiring complex centralized control
Solution Approach 2:
The patent applies different clock frequencies to different DAC cores locally, rather than using a uniform frequency across all cores. This local differentiation allows each DAC core to operate optimally in its specific frequency range, improving the overall adaptability and frequency coverage of the device
2Adaptability or versatility
If the clock frequency is changed to shift the restricted frequency area, then the frequency coverage can be adjusted, but all DAC cores still share the same restricted frequency area and the problem is only shifted to another frequency range
Solution Approach 1:
The patent segments the frequency operation of each DAC core by providing different clock frequencies to each core. This allows each core to operate in a different frequency range simultaneously, eliminating the problem of a common restricted frequency area that plagues unified frequency operation across all cores
Solution Approach 2:
The patent changes the clock frequency parameter for each DAC core individually, allowing each core to operate at its optimal frequency. This parameter differentiation enables the device to cover a broader frequency range without the restrictions that would be imposed by a single common frequency
Data Source
AI summary
A digital-to-analog conversion device and a digital-to-analog conversion system with multiple digital-to-analog conversion cores is provided. At least some of the multiple digital-to-analog conversion cores may be operated with different clock signals, especially with clock signals of different clock frequencies. For this purpose, each digital-to-analog conversion stage is provided with multiple different clock signals and each stage individually selects one of the multiple clock signals.