Multicore Interface Dynamic Task Management for MPU-DSP Communication
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Solution Overview
Problem
Current multicore processor systems face inefficiencies due to lack of direct interaction between microprocessor units (MPUs) and digital signal processors (DSPs), leading to performance degradation and increased resource wastage, particularly in context switching and interrupt handling.
Innovation Solution
A multicore interface with dynamic task management capability is introduced, featuring a communication interface that searches for idle processing units in the DSP, assigns tasks dynamically, and optimizes data transmission through double input/output buffers and system control variables, enabling efficient task loading and offloading between processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interrupt-driven inter-processor communication is used between MPU and DSP, then task coordination is achieved, but DSP subsystem efficiency degrades significantly
Solution Approach 1:
The patent introduces a communication interface as an intermediary component between the MPU and DSP. This interface includes a task controller that manages task queues and processing unit allocation, acting as a mediator that coordinates tasks without requiring interrupt-driven communication. The task controller maintains task queues in memory and dynamically allocates processing units, eliminating the need for frequent interrupts while ensuring reliable task coordination.
2Adaptability or versatility
If a software abstraction hierarchy is used for DSP program development, then task management capability is improved, but hardware resource usage increases
Solution Approach 1:
The communication interface is designed with multi-functional capabilities that eliminate the need for separate hardware resources. The task controller can dynamically allocate processing units from a shared pool, manage multiple task queues, and handle both task scheduling and processing unit assignment functions. This universal design provides advanced task management capability while using a unified hardware structure rather than multiple specialized components.
3Manufacturing precision
If DSP processing units are kept idle waiting for tasks, then task completion accuracy is maintained, but DSP utilization decreases
Solution Approach 1:
The task controller performs preliminary actions by pre-loading task queues into memory and proactively searching for idle processing units before tasks are submitted. When the MPU submits a task, the controller has already prepared the task queue structure and can immediately allocate an idle processing unit, eliminating waiting time. This preliminary preparation ensures tasks are executed accurately without delaying DSP utilization.
4Productivity
If direct interaction between MPU and DSP is implemented, then communication efficiency is improved, but system complexity increases
Solution Approach 1:
The patent segments the communication interface into distinct functional modules: a task controller for managing task queues and processing unit allocation, and communication logic for interfacing with the MPU. This segmentation allows each module to perform its function independently and efficiently. The task controller handles high-level task management while the communication logic handles low-level data transfer, improving communication efficiency without creating a monolithic complex system.
Data Source
AI summary
A multicore interface with dynamic task management capability and a task loading and offloading method thereof are provided. The method disposes a communication interface between a micro processor unit (MPU) and a digital signal processor (DSP) and dynamically manages tasks assigned by the MPU to the DSP. First, an idle processing unit of the DSP is searched, and then one of a plurality of threads of the task is assigned to the processing unit. Finally, the processing unit is activated to execute the thread. Accordingly, the communication efficiency of the multicore processor can be effectively increased while the hardware cost can be saved.