Multicore Interferer Generation for Deterministic Core Testing
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Solution Overview
Problem
Multicore processors often result in non-deterministic operations due to shared resource access, which can lead to increased execution time and failure to meet real-time requirements, particularly in critical applications like aviation, prompting the need for deterministic software testing.
Innovation Solution
An automated framework generates processor-specific interferers to test multicore determinism, ensuring deterministic and repeatable interference testing, with configurable parameters and post-processing analysis to identify worst-case latencies and deviations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple processor cores are used to increase processing capability, then productivity is improved, but determinism deteriorates due to non-deterministic operations from shared resource access
Solution Approach 1:
The system segments the testing function into separate interferer generation modules that can be independently configured and executed on different cores. This allows systematic isolation and characterization of interference patterns from individual cores while maintaining overall multicore operation, enabling determinism assessment without sacrificing processing capability.
Solution Approach 2:
The framework changes testing parameters by generating interferers with configurable characteristics (timing, intensity, frequency) to systematically characterize processor behavior under different interference conditions. This enables the system to identify patterns and establish deterministic bounds despite the inherent non-determinism of multicore shared resource access.
2Reliability
If additional processor cores are deactivated to maintain determinism, then determinism is preserved, but productivity deteriorates due to reduced processing capability
Solution Approach 1:
The system employs self-service by automatically generating and executing interference tests without manual intervention. The automated framework characterizes processor behavior and identifies interference patterns, enabling engineers to make informed decisions about core configuration and resource allocation to achieve both determinism and productivity goals.
Solution Approach 2:
The framework implements feedback by measuring execution times and interference patterns, then using this data to refine understanding of processor behavior. This feedback loop enables systematic optimization of core activation strategies, allowing the system to maintain determinism while maximizing productive core utilization based on empirical performance data.
3Measurement precision
If manual interference testing is performed to characterize processor behavior, then measurement precision is improved, but loss of time increases due to time-consuming test development
Solution Approach 1:
The system performs preliminary action by pre-generating interference test patterns and configurations that can be systematically applied to characterize processor behavior. The automated framework prepares comprehensive test suites in advance, eliminating the need for time-consuming manual test development while maintaining high measurement precision through configurable interferer parameters.
Solution Approach 2:
The framework substitutes manual mechanical testing processes with automated software-based interferer generation and execution. This replacement eliminates time-consuming manual test setup and execution while maintaining or improving measurement precision through systematic, repeatable automated testing procedures that can be rapidly configured and executed.
Data Source
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AI summary
A system for multi-core interferer generation includes a processor and a memory including instructions which, when executed by the processor, cause the system at least to perform generating an interference test for one or more processor cores based upon one or more configuration files; introducing interference to the one or more processor cores to generate one or more interference test results; and filtering the one or more test results by evaluating performance data against one or more expected result hypotheses, each defining benchmark execution behavior and tolerance thresholds.