Multi-Core LDPC Processing for 5G NR Software Modems
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Solution Overview
Problem
Current communication systems, such as 5G NR, face challenges in achieving high-speed data processing for LDPC encoding and decoding using general-purpose processors, which are essential for software-based modems but are not efficiently supported by conventional methods.
Innovation Solution
Implementing LDPC encoding and decoding on a multi-core based general-purpose processor by generating recognizable tasks, splitting them into sub-tasks, and assigning these sub-tasks to individual cores for concurrent processing, utilizing multi-thread and multi-task techniques to enhance data processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If LDPC encoding and decoding is implemented on a general-purpose processor using conventional single-core/single-task methods, then device complexity is reduced and ease of operation is improved, but processing speed is insufficient for high-speed data communication requirements
Solution Approach 1:
The patent divides the LDPC encoding and decoding tasks into multiple independent code block tasks, which are then further segmented into sub-tasks that can be executed in parallel across multiple processor cores. This segmentation enables concurrent processing without requiring complex hardware modifications, thus improving processing speed while maintaining software-based implementation simplicity
Solution Approach 2:
The patent transitions from single-core sequential processing to multi-core parallel processing by utilizing the temporal and spatial dimensions of multiple processor cores simultaneously. This dimensional change allows multiple code block tasks to be processed concurrently, significantly enhancing processing speed without increasing device complexity at the hardware level
2Productivity
If multiple code block tasks are processed sequentially on a single core, then ease of operation is maintained, but processing speed and productivity are insufficient for 5G NR communication requirements
Solution Approach 1:
The patent ensures continuous utilization of multiple processor cores by maintaining a pipeline of code block tasks and sub-tasks. As long as there are pending tasks, cores remain actively engaged in processing, eliminating idle time and maximizing productivity. This continuous action approach ensures that processing time is minimized while throughput is maximized for 5G NR communication requirements
Data Source
AI summary
A method for Low Density Parity Check (LDPC) encoding and decoding for a general-purpose processor in methods for performing LDPC encoding and decoding by a multi-core based general-purpose processor includes: generating a recognizable task from a plurality of code blocks (CBs) by the general-purpose processor; splitting the task into two or more split tasks; assigning the split tasks into the respective cores; generating LDPC encoded split tasks by performing LDPC encoding and/or LDPC decoding on each code block within the split task of the core; and concatenating the LDPC encoded split tasks.