Multi-Core LDPC Decoding With Compacted Graph Representation
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Solution Overview
Problem
Decoding data encoded with low density parity check codes requires significant memory and processing resources, particularly when using soft decoding algorithms, which is a challenge in efficient data transmission and communication protocols.
Innovation Solution
The use of a processor with multiple cores that employs a compacted representation of base graphs and lifting sets to perform partial decoding operations in parallel, utilizing message passing algorithms and belief propagation to efficiently decode data encoded with LDPC codes, such as those used in 5G NR communications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If soft decoding algorithms are used for LDPC codes, then decoding accuracy is improved, but memory and processing resources increase significantly
Solution Approach 1:
The patent divides the LDPC decoding process into multiple independent stages: syndrome calculation, error pattern identification using coset leaders, and correction. This segmentation allows each stage to use optimized algorithms appropriate to its function, reducing overall computational complexity while maintaining soft decoding accuracy through selective application of belief propagation where needed.
Solution Approach 2:
The patent extracts and pre-computes coset leaders and syndromes for the LDPC code structure, storing them in lookup tables. This extraction of critical decoding information allows the main decoding process to operate with reduced complexity by simply comparing and matching rather than performing full soft decoding computations for every operation.
2Reliability
If complex parity check codes are used for communications protocols, then error correction capability is improved, but decoding time and computational resources increase
Solution Approach 1:
The patent performs preliminary actions by pre-calculating and storing coset leaders, syndromes, and error patterns in lookup tables before actual decoding operations. This preliminary preparation enables rapid decoding during communication by replacing complex real-time computations with fast table lookups and comparisons, significantly reducing decoding time while maintaining the error correction capability of complex LDPC codes.
Solution Approach 2:
The patent creates simplified copies of the decoding problem by representing error patterns as coset leaders and syndromes. Instead of solving the full complex decoding problem each time, the system uses these pre-created representations to quickly identify and correct errors through pattern matching, reducing decoding time while preserving the robust error correction of complex parity check codes.
3Reliability
If full decoding operations are performed on LDPC codes, then complete error correction is achieved, but processing load and memory usage increase
Solution Approach 1:
The patent applies partial action by implementing a two-stage decoding approach: first using syndrome-based error pattern identification for common error cases, and only invoking full belief propagation when necessary. This partial application of computationally intensive operations maintains complete error correction capability for detectable error patterns while significantly improving processing efficiency by avoiding unnecessary full decoding operations.
Solution Approach 2:
The patent enables self-service decoding by implementing syndrome calculation and error pattern matching that can independently identify and correct many error cases without requiring resource-intensive full decoding operations. The system serves itself by using the structure of the LDPC code and pre-computed coset leaders to handle routine decoding tasks autonomously, reserving full processing power only for exceptional cases.
Data Source
AI summary
Apparatuses, systems, and techniques to decode encoded data. In at least one embodiment, parts of information for decoding the encoded data is provided to a plurality of processors, and parts of data decoded by the plurality of processors is combined.


