Multi-Core Package Power Sharing Through Switched Substrate Interconnects
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Solution Overview
Problem
Existing package designs for integrated devices with multiple cores struggle to optimize power distribution, leading to suboptimal performance due to the separation of power planes, which weakens the power distribution network and results in inefficient allocation of power resources.
Innovation Solution
Incorporating switches in the substrate to enable the sharing of power resources between cores, allowing additional power to be rerouted from one core to another when needed, using transistors with gate, source, and drain interconnects to control the flow of power across different power planes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power planes are separated for different cores, then each core has dedicated power supply, but the power distribution network becomes weak and power resource allocation becomes inefficient
Solution Approach 1:
The patent merges previously separate power planes into a shared power distribution network. Multiple cores share common power planes through controlled impedance routes, allowing dynamic power allocation while maintaining network robustness. This resolving the contradiction by combining separate power supplies into a unified system that provides both reliability and allocation efficiency.
Solution Approach 2:
The patent implements dynamic power resource allocation where power distribution is not fixed but can be adjusted based on core performance needs. The system can dynamically route power from underutilized cores to high-performance cores through the shared power network, making the power distribution adaptive rather than static.
2Device complexity
If power resources are dedicated to each core, then power allocation is simple, but cores with higher power demands cannot receive additional power from other cores
Solution Approach 1:
The patent makes power planes universal by enabling them to serve multiple cores simultaneously. A single power plane can supply power to different cores at different times or in combination, making the power distribution system multi-functional rather than dedicated to a single core.
Solution Approach 2:
The patent introduces intermediate routing structures and control mechanisms that mediate between dedicated power sources and variable core power demands. These intermediaries enable flexible power redistribution while maintaining manageable system complexity through structured control.
3Productivity
If power planes are shared between cores, then power resource utilization is optimized, but the power distribution network becomes more complex
Solution Approach 1:
The patent segments the shared power distribution network into controlled impedance routes with defined characteristics. By dividing the power network into manageable segments with specific electrical properties, the system achieves efficient power sharing while maintaining design control and reducing overall complexity.
Solution Approach 2:
The patent utilizes controlled impedance parameters to manage power distribution in the shared network. By carefully designing and maintaining specific impedance values throughout the power routes, the system enables efficient power sharing while simplifying the analysis and design of the power distribution network.
Data Source
AI summary
A package that includes a substrate and integrated device coupled to the substrate. The integrated device includes a first core and a second core. The substrate includes a first power interconnect configured to provide a first electrical path for a first power resource to the first core of the integrated device. The substrate includes a second power interconnect configured to provide a second electrical path for a second power resource to the second core of the integrated device. The substrate includes a switch coupled to the first power interconnect and the second power interconnect, where if the switch is turned on, the switch is configured to enable at least some of the power resource from the second power resource to contribute to the first core of the integrated device.


