Multicore Packet Processing Core Selection

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Solution Overview

Problem

The existing receive packet steering (RPS) and receive flow steering (RFS) techniques in multicore electronic devices fail to optimize throughput and efficiency due to random core selection for packet processing, leading to potential delays and inefficient operation, especially when the capabilities of driver and network stack processing cores do not match application demands.

Innovation Solution

A multicore electronic device is designed with a communication circuit and memory that identifies the optimal locations for driver, network processing, and application cores to determine the most suitable core for network stack processing based on the performance and interoperation of these cores, ensuring efficient batch processing by selecting a core with capabilities equal to or greater than those in higher layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If packets are processed by a network core located at the same location as the application core (RFS technique), then processing efficiency is improved, but a load is applied to the corresponding core resulting in failure to achieve full use of multicore performance

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidmulticore performance utilization
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent segments the packet processing function by introducing a dedicated network processing core layer between the driver core layer and application core layer. This segmentation allows different cores to handle different processing stages, preventing overload on application cores while maintaining processing efficiency through specialized network processing cores.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds a new dimension to the packet processing architecture by introducing a network processing core layer as an intermediate layer. This dimensional addition creates a three-layer processing structure (driver core layer, network processing core layer, application core layer), enabling better distribution of processing loads across multiple cores.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If cores are selected randomly for processing packets (RPS technique), then core selection simplicity is improved, but throughput optimization is delayed or failed

Engineering Contradiction:
Improvecore selection simplicityVSAvoidthroughput
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent implements dynamic core selection where the network processing core is determined based on the capabilities and interoperations of driver cores, network cores, and application cores. This dynamic approach allows the system to adaptively select the most suitable core for processing packets, optimizing throughput while maintaining operational simplicity through automated selection.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the selection parameter from random selection to capability-based selection. The system evaluates the capabilities of available cores and selects the network processing core that best matches the processing requirements, thereby optimizing throughput while keeping the selection process simple through automated capability assessment.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If driver and network stack processing core capabilities do not match application demands, then core capability simplicity is improved, but batching in NAPI and TCP processing procedure is difficult leading to low throughput

Engineering Contradiction:
Improvecore capability matching complexityVSAvoidthroughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent performs preliminary capability assessment of driver cores, network cores, and application cores before packet processing. By evaluating core capabilities in advance and selecting the most suitable network processing core based on these assessments, the system ensures that batching operations can proceed efficiently without capability mismatches, thereby maintaining high throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the system continuously monitors the interoperations and capabilities of different cores, and adjusts the network processing core selection accordingly. This feedback loop ensures that the selected core always has the appropriate capabilities to handle the current processing demands, optimizing throughput while managing complexity through automated adjustment.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11758023B2Multicore electronic device and packet processing method thereof
Publication Date: 2023.09.12 SAMSUNG ELECTRONICS CO LTD
  • US11758023B2 patent drawing
  • US11758023B2 patent drawing
  • US11758023B2 patent drawing

AI summary

A multicore electronic device is provided. The multicore electronic device includes a multicore including a plurality of cores, each core being configured to process packets in a driver core layer, a network processing core layer, and an application core layer, and a memory configured to store executions instructions for causing a first core of the plurality of cores to, when the packets are received, identify a location of a driver core for delivering the packets to an operating system domain, a location of an application core for processing the packets in a user domain, and a processing amount, determine a location of a network processing core for processing the packets based on at least one of the location of the driver core, the location of the application core, and the processing amount of the session, and control the network processing core to perform network stack processing on the packets.