Multicore Power Management via Resource Power Manager
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Solution Overview
Problem
Modern multicore computing devices face challenges in maximizing battery life due to the complexity of managing multiple resources and independent cores, which leads to inefficiencies in selecting optimal low power modes, resulting in suboptimal power savings and increased latency.
Innovation Solution
A method for a multicore computing device that identifies resources for low power modes based on latency requirements, selects a combination of low power modes that maximize power savings while meeting latency constraints, and manages shared resources independently across cores, using a resource power manager and subsystem power management hardware blocks to coordinate power states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional power management is used in multicore devices, then device complexity is reduced, but power consumption increases and battery life decreases
Solution Approach 1:
A resource power manager (RPM) processor is introduced as an intermediary component between the multiple application processor cores and the shared resources. The RPM processor receives resource usage requests from cores, determines optimal low power modes for shared resources, and coordinates power state transitions. This intermediary structure enables sophisticated power management without requiring each core to independently manage resource power states, thus reducing overall system complexity while achieving optimal power consumption.
Solution Approach 2:
The system dynamically selects low power modes for shared resources based on real-time usage patterns and latency requirements. The RPM processor evaluates multiple factors including expected idle time, power savings potential, and latency constraints to adaptively determine the optimal power state for each resource. This dynamic approach allows the system to transition between different power management strategies depending on operational conditions, maximizing power efficiency without sacrificing performance when needed.
2Loss of energy
If low power modes are selected without considering latency requirements, then power savings increase, but latency increases and system performance deteriorates
Solution Approach 1:
The system changes the operational parameters of shared resources by selecting from multiple predefined low power modes, each with different power consumption and latency characteristics. The RPM processor evaluates latency requirements for each resource and selects the appropriate low power mode that satisfies the specific latency constraint while maximizing power savings. This parameter-based approach allows flexible trade-offs between power consumption and latency based on actual system needs.
3Loss of energy
If cores share resources without independent power management, then device complexity is reduced, but power savings are suboptimal
Solution Approach 1:
The power management functionality is segmented into two distinct layers: the RPM processor that handles resource-level power management, and the application processor cores that handle computation. This segmentation allows each component to specialize in its primary function while the RPM processor independently manages power states of shared resources based on usage patterns from multiple cores. The segmentation enables optimal power savings without requiring complex inter-core coordination for resource power management.
4Duration of action of moving object
If all cores must coordinate to enter low power mode, then resource consistency is maintained, but latency increases and battery life decreases
Solution Approach 1:
The RPM processor performs preliminary evaluation of low power mode options and latency requirements before cores attempt to enter sleep mode. By pre-determining which resources can be placed in low power states and which require staying active, the system avoids latency-inducing coordination overhead during actual sleep transitions. This preliminary action enables cores to enter low power modes independently and quickly while maintaining resource consistency.
Data Source
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AI summary
The aspects enable a multi-core processor or system on chip to determine a low power configuration that provides the most system power savings by placing selected resources in a low power mode depending upon acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. Each of the cores/processing units treated in a symmetric fashion, and each core may choose its operating state independent of the other cores, without performing complex handshaking or signaling operations.