Multicore Pre-Boot Framework for SoC Boot Time Reduction
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Solution Overview
Problem
System-on-chip (SoC) boot times are prolonged due to the increased number of firmware images required for multiple hardware components, which complicates secure boot processes and fails to meet performance metrics, especially with the growing complexity of portable computing devices.
Innovation Solution
Implementing a multicore framework in the pre-boot environment where a primary processor (BSP) initiates bootup and schedules tasks for secondary processors (APs) to execute boot-up tasks in parallel, leveraging a shared memory for inter-processor communication and utilizing protocols like multicore scheduling and I/O protocols to optimize boot processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple firmware images are executed for each hardware component in the boot sequence, then secure boot and integrity checking are improved, but boot time increases
Solution Approach 1:
The patent segments the boot process into distinct phases (Phase 1: Integrity checking of first firmware image; Phase 2: Execution of first firmware image; Phase 3: Integrity checking of second firmware image; Phase 4: Execution of second firmware image). This segmentation allows systematic verification of multiple firmware images while maintaining clear execution flow, resolving the contradiction between thorough security checking and boot time efficiency.
Solution Approach 2:
The patent performs integrity checking of the second firmware image during the execution phase of the first firmware image (Phase 3 occurs during Phase 2). This preliminary action ensures that security verification is done in advance before the second firmware image needs to be executed, preventing delays in the boot sequence while maintaining security requirements.
2Reliability
If hashing algorithms and encryption algorithms are implemented for integrity checking and authentication of firmware images, then security is improved, but boot time increases
Solution Approach 1:
The patent implements continuous useful action by performing integrity checking of the second firmware image concurrently with the execution of the first firmware image. The security algorithms (hashing, encryption) continue to process firmware images without idle periods, maintaining security verification while optimizing boot time by eliminating sequential waiting periods.
3Adaptability or versatility
If more hardware components are added to the SoC to increase functionality, then device capability is improved, but the number of firmware images increases leading to longer boot time
Solution Approach 1:
The patent performs preliminary integrity checking of firmware images during the execution of previous firmware images. This allows the system to handle multiple firmware images from additional hardware components without proportionally increasing total boot time, as verification is done in advance during overlapping execution phases.
Solution Approach 2:
The patent maintains continuous useful action by overlapping the execution of firmware images with the integrity checking of subsequent firmware images. This continuous processing approach allows the system to accommodate more hardware components and their associated firmware images while minimizing the impact on boot time through efficient utilization of processing resources.
Data Source
AI summary
Various aspects are described herein. In some aspects, the disclosure provides a method of enabling a multicore framework in a pre-boot environment for a system-on-chip (SoC) comprising a plurality of processors comprising a first processor and a second processor. The method includes initiating, by the first processor, bootup of the SoC into a pre-boot environment. The method further includes scheduling, by the first processor, execution of one or more boot-up tasks by a second processor. The method further includes executing, by the second processor, the one or more boot-up tasks in the pre-boot environment. The method further includes executing, by the first processor, one or more additional tasks in parallel with the second processor executing the one or more boot-up tasks.