Multicore Ring Bus Turn-Back Structure for Register File Access
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Solution Overview
Problem
In multicore processors, simultaneous push and pull requests on a ring bus can collide, leading to complex scheduling and reduced data transfer throughput due to increased bus traffic and resource requirements.
Innovation Solution
The implementation of a scheduler that controls push and pull requests through separate buses (pull request bus, push request bus, and pull data return bus) within each core group, allowing for independent scheduling and reducing the need for a ring bus, thereby preventing collisions and simplifying bus arbitration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a ring bus is used to connect multiple cores, then the amount of wiring is reduced and access throughput is maintained, but collisions occur between simultaneous push and pull requests requiring complex scheduling
Solution Approach 1:
The patent segments the single ring bus into separate push request bus and pull request bus, allowing independent transmission of push and pull requests without collisions. This segmentation resolves the contradiction by maintaining the compact ring structure while eliminating the need for complex collision avoidance scheduling.
2Device complexity
If separate push and pull request buses are implemented, then collisions are avoided and scheduling is simplified, but the amount of bus wiring increases
Solution Approach 1:
The patent merges the push request bus and pull request bus into a unified ring bus structure where both types of requests share the same physical bus infrastructure. This combining approach reduces the overall wiring area while maintaining separate logical channels for push and pull requests, thus resolving the contradiction between wiring area and scheduling complexity.
3Reliability
If issue timings of push and pull requests are shifted to avoid collisions, then collisions are prevented, but data transfer throughput decreases
Solution Approach 1:
The patent introduces a bus arbitration mechanism as an intermediary that manages push and pull request transmissions on the ring bus. The arbitration system allocates bus access rights dynamically, allowing simultaneous push and pull requests to be serviced without collisions, thereby maintaining high data transfer throughput while ensuring reliable collision-free operation.
Data Source
AI summary
An arithmetic processing device includes arithmetic processing units, each having a calculator unit; a scheduler that controls a push instruction to write data to a register file in one of the arithmetic processing units and a pull instruction to read data from the register file; a pull request bus to which the scheduler outputs a pull request and which is connected to the arithmetic processing units; a push request bus to which the scheduler outputs a push request and which is connected to the arithmetic processing units; and a pull data bus that inputs, into the scheduler, pull data read from the register file in response to the pull request. Each of the arithmetic processing units includes a pull data turn-back bus that propagates pull data read from its register file to the pull data bus.