Multi-Core Scheduling with Scratchpad Memory and Wake-Up Feedback
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Solution Overview
Problem
In multi-core systems, especially those with scratchpad memory, synchronization and load balancing between cores become increasingly difficult as the number of processors grows, leading to reduced scalability and real-time performance issues, along with high costs associated with task movement between cores.
Innovation Solution
A synchronization scheduling apparatus and method that utilizes a storage unit to store information about cores that receive wake-up signals and a scheduling processor to schedule tasks based on priorities, minimizing task movement and optimizing parallel processing by adjusting timing and applying various scheduling schemes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a shared memory structure with cache is used, then memory access is simplified, but scalability is reduced and real-time performance cannot be ensured
Solution Approach 1:
The patent divides the memory structure into per-core scratchpad memories rather than a centralized shared memory, allowing each core to have independent memory access. This segmentation enables better scalability and real-time performance by eliminating cache coherency issues while maintaining memory access capabilities.
Solution Approach 2:
The patent introduces a synchronization mechanism as an intermediary between cores to coordinate task execution. This mediator handles synchronization operations explicitly, allowing the system to maintain real-time performance guarantees while using distributed scratchpad memory architecture.
2Adaptability or versatility
If scratchpad memory is used instead of cache, then scalability is improved, but task movement costs increase
Solution Approach 1:
The patent performs preliminary actions by pre-scheduling tasks and pre-positioning them in wait queues before execution is needed. This allows the system to minimize task movement costs by having tasks ready to execute without requiring frequent context switches or data transfers between cores.
Solution Approach 2:
The patent implements a feedback mechanism where cores send wake-up signals to the scheduler when they need tasks. This feedback loop enables efficient task distribution and reduces unnecessary task movements by only transferring tasks when actually needed, optimizing the balance between scalability and movement costs.
3Productivity
If synchronization is implemented to coordinate parallel jobs, then parallel processing performance is improved, but system complexity increases
Solution Approach 1:
The patent implements self-service synchronization where each core autonomously manages its own wait queue and wake-up signaling. This self-service approach simplifies the overall synchronization mechanism by eliminating the need for complex centralized coordination while maintaining effective parallel processing performance.
4Reliability
If tasks are scheduled based on priority, then real-time performance is improved, but starvation of equal-priority tasks may occur
Solution Approach 1:
The patent introduces dynamic scheduling adjustments where the scheduler alternates between processing tasks from different cores with equal priority. This dynamic approach prevents starvation by changing the scheduling pattern over time, ensuring fair task completion while maintaining real-time performance guarantees.
Data Source
AI summary
A synchronization scheduling apparatus and method in a real-time multi-core system are described. The synchronization scheduling apparatus may include a plurality of cores, each having at least one wait queue, a storage unit to store information regarding a first core receiving a wake-up signal in a previous cycle among the plurality of cores, and a scheduling processor to schedule tasks stored in the at least one wait queue, based on the information regarding the first core.