Heterogeneous Multi-Core Scheduling for Parallel Thread Allocation
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Solution Overview
Problem
Existing electronic devices with heterogeneous multi-core architectures struggle to meet diverse computing power requirements, leading to inefficient utilization of processor cores and wasted performance or power consumption.
Innovation Solution
A heterogeneous multi-core apparatus with high-performance, energy-efficient, and medium-performance cores that allocate computing resources dynamically based on thread performance requirements, allowing parallel execution and flexible resource allocation through time division multiplexing and simultaneous multithreading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a limited number of processor core types are used in the heterogeneous multi-core architecture, then the device complexity is reduced and manufacturing is simplified, but the ability to meet diverse computing power requirements of various threads deteriorates, leading to performance waste and inefficient resource utilization
Solution Approach 1:
The patent implements simultaneous multithreading capability across all processor cores, enabling each core to execute multiple threads concurrently. This multi-functional capability allows a limited number of core types to serve diverse computing requirements by dynamically allocating different threads to the same core based on their computing power needs, thereby resolving the contradiction between limited core types and diverse adaptability requirements
Solution Approach 2:
The patent introduces dynamic thread scheduling and resource allocation mechanisms that allow the system to adaptively assign threads to appropriate cores based on real-time computing power requirements. This dynamic adjustment enables the heterogeneous multi-core system to flexibly meet diverse computational demands without requiring an increase in the number of core types
2Productivity
If high-performance cores are used to meet high computing power requirements, then the performance capability is improved, but the power consumption increases significantly
Solution Approach 1:
The patent implements dynamic thread scheduling that monitors and adjusts thread allocation to processor cores based on real-time computing power requirements and power consumption conditions. When high computing power is needed, high-performance cores are activated; when lower performance suffices, the system transitions to energy-efficient cores, thereby dynamically balancing performance and power consumption
Solution Approach 2:
The patent changes the operational parameters of processor cores by enabling simultaneous multithreading, which allows high-performance cores to handle multiple threads concurrently. This increases the effective computing power output per core without proportionally increasing power consumption, as the additional computing capacity is achieved through parallel thread execution rather than adding more high-power cores
3Use of energy by moving object
If energy-efficient cores are used to reduce power consumption, then the power consumption is reduced, but the computing power performance becomes insufficient for high-demand threads
Solution Approach 1:
The patent enables energy-efficient cores to perform multiple functions by implementing simultaneous multithreading capability. These cores can handle multiple threads concurrently, including a mix of high-performance and low-performance threads, thereby expanding their functional capacity beyond what would be expected from their individual performance characteristics alone
Solution Approach 2:
The patent merges the execution of multiple threads with different performance requirements into a single energy-efficient core through simultaneous multithreading. By combining multiple thread execution contexts within one core, the system achieves better resource utilization and reduces the need to activate additional high-power cores, thereby maintaining acceptable performance while reducing overall power consumption
4Reliability
If dedicated computing resources are allocated to each thread on separate cores, then the execution reliability is improved, but the resource utilization efficiency deteriorates due to idle resources
Solution Approach 1:
The patent makes processor cores universal by enabling them to execute multiple threads simultaneously through simultaneous multithreading. This allows a single core to serve multiple threads that would traditionally require dedicated cores, thereby reducing idle resources and improving utilization efficiency while maintaining execution reliability through proper thread management and scheduling
Solution Approach 2:
The patent merges multiple thread execution contexts into a single core, combining resources that would otherwise remain idle. By consolidating thread execution on shared cores with simultaneous multithreading support, the system reduces the number of actively used cores, thereby reducing power consumption and improving resource utilization while maintaining the reliability needed for proper thread execution
Data Source
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AI summary
This application provides a heterogeneous multi-core apparatus and a scheduling method. The heterogeneous multi-core apparatus includes a plurality of cores. The plurality of cores include at least one high-performance core and at least one energy-efficient core. Maximum power consumption of any one of the at least one high-performance core is greater than maximum power consumption of any one of the at least one energy-efficient core. A maximum computing capacity of any one of the at least one high-performance core is greater than a maximum computing capacity of any one of the at least one energy-efficient core. A first core of the plurality of cores may allocate a first computing resource to a first thread, and allocate a second computing resource to a second thread. The first computing resource and the second computing resource belong to a second core of the plurality of cores. The second core is the first core or another core different from the first core. The second core may execute the first thread and the second thread in parallel. Among the cores in the heterogeneous multi-core apparatus, any type of core may be used to execute a plurality of threads in parallel. This can effectively improve utilization of computing resources in the heterogeneous multi-core apparatus.