Multi-Core SoC Transparent Execution Integrity
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Solution Overview
Problem
Current avionics systems face challenges in implementing high integrity processing in multi-core system-on-a-chip (SoC) architectures due to synchronization issues with asynchronous hardware events and the lack of transparent lockstep execution, leading to potential false comparison errors and compromised integrity.
Innovation Solution
A system and method that uses hypervisors or dedicated monitoring elements to align thread execution across cores by monitoring system resource utilization, comparing process counters, and verifying data sets during application frame switching, ensuring synchronized input and output coordination to prevent corrupted data propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transparent lockstep execution is implemented using hardware comparison logic, then processing integrity is improved, but device complexity increases due to requiring discrete host processors and external comparison logic
Solution Approach 1:
The patent merges the integrity checking function into the multi-core SoC processor itself, combining the processing cores and comparison logic into a single integrated device. This eliminates the need for discrete host processors and external comparison logic, reducing device complexity while maintaining processing integrity through transparent execution monitoring.
Solution Approach 2:
The multi-core SoC processor performs multiple functions: it executes application software on multiple cores simultaneously while also performing integrity checking through transparent execution monitoring. This universal approach allows a single device to handle both processing and verification tasks, reducing the need for separate dedicated components.
2Productivity
If multi-core SoC architecture is used to improve processing performance, then productivity is improved, but synchronization of asynchronous hardware events becomes difficult leading to potential false comparison errors
Solution Approach 1:
The patent uses preliminary action by having the integrity monitoring mechanism establish execution alignment at the start of transparent execution sequences. By pre-synchronizing the multi-core processors and establishing alignment markers before critical operations, the system prepares the execution state in advance, enabling accurate comparison even with asynchronous hardware events during processing.
Solution Approach 2:
The patent introduces an intermediary alignment mechanism that mediates between asynchronous multi-core execution and integrity comparison. This intermediary layer uses alignment markers and state tracking to bridge the timing differences between cores, allowing accurate integrity verification without requiring strict synchronous execution of all hardware events.
3Reliability
If thread scheduling is synchronized across multiple cores with high determinism, then processing alignment is improved, but scheduling complexity and false comparison error rate increase
Solution Approach 1:
The patent extracts the integrity monitoring and alignment tracking functions from the complex thread scheduling mechanism. By separating these functions into a dedicated transparent execution monitoring layer that operates independently of OS schedulers, the system achieves execution alignment without the complexity of synchronized thread scheduling, reducing false comparison errors while maintaining simplicity.
Data Source
AI summary
Transparently executing applications among cores in a multi-processor system includes monitoring elements associated with each processor which align execution of threads within corresponding cores of the processors. Alignment is accomplished by monitoring system resource utilization by each core, comparing process counters associated with corresponding cores, and comparing data sets in and out during application frame switching. In a further aspect, inputs are coordinated by a synchronization element. Likewise, outputs for corresponding cores are compared to ensure no corrupted data is propagated.