Multi-Processor Time Synchronization via Broadcast Start-Timer

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Solution Overview

Problem

Conventional time-of-day approaches in multi-processor systems are inefficient and prone to inconsistencies due to changes in timing and handling of leap years and varying month lengths, leading to potential discontinuities in event scheduling.

Innovation Solution

A multi-processor system that uses a common clock and internal time counters to maintain synchronization among processing elements, where a time-synchronization manager broadcasts a start-timer command after an initial timing mark, allowing all elements to initiate their internal time references and count concurrently, ensuring precise event scheduling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional time-of-day (TOD) approaches based on real-time clock (RTC) are used, then event scheduling can be implemented, but timing discontinuities and inconsistencies occur when TOD changes

Engineering Contradiction:
Improvetiming consistencyVSAvoidscheduling discontinuity
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the time reference functionality from the conventional TOD/RTC system and implements a separate, dedicated time reference system that operates independently. Each processor maintains its own time reference counter that counts down from a predetermined value, eliminating dependency on TOD changes and their associated discontinuities.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system performs preliminary synchronization by having processors exchange time reference information and adjust their counters before actual event scheduling occurs. This preliminary action ensures all processors are synchronized to the same time reference before scheduling events, preventing timing discontinuities.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If TOD logic is implemented within each processor to handle leap years and varying month lengths, then calendar accuracy is improved, but system complexity and inefficiency increase

Engineering Contradiction:
Improvecalendar accuracyVSAvoidprocessor logic complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent removes complex calendar calculation logic from individual processors by extracting this function entirely. Instead of implementing TOD logic that handles leap years and varying month lengths, the system uses a simple counter-based time reference that increments or decrements at a fixed rate, eliminating the need for complex calendar arithmetic in processor logic.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system changes the fundamental parameter from calendar-based time representation (years, months, days) to a simple numerical counter that increments or decrements at a constant rate. This parameter change simplifies the time reference system while maintaining the ability to schedule events with precise timing.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If multiple processors maintain independent time references, then operational independence is maintained, but synchronization between processors deteriorates

Engineering Contradiction:
Improveprocessor independenceVSAvoidsynchronization stability
Core Design Contradiction:
Ease of operationVSStability of the object's composition

Solution Approach 1:

The patent implements a feedback mechanism where processors periodically exchange their time reference counter values with each other. Based on this feedback, processors can detect drift and adjust their counters to maintain synchronization. This feedback loop preserves both operational independence and synchronization stability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs preliminary synchronization operations where processors compare and align their time references before executing scheduled events. This preliminary action ensures that even though processors operate independently, they maintain synchronized time references for consistent event scheduling across the system.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10185350B2Multi-processor system and method for internal time synchronization and event scheduling of multiple processors
Publication Date: 2019.01.22 BAE SYSTEMS INFORMATION ANDELECTRONIC SYSTEMS INTEGRATION INC
  • US10185350B2 patent drawing
  • US10185350B2 patent drawing

AI summary

Embodiments of a multi-processor system and method for synchronization and event scheduling of multiple processing elements are generally described herein. In some embodiments, timing marks are provided to the processing elements and a start-timer command is broadcasted to the processing elements after an initial timing mark. The start-timer command instructs the processing elements to initiate an internal time reference after receipt of a next timing mark. Each of the processing elements maintains a copy of the internal time reference which may be used for synchronized event scheduling.