Multicore Processor Synchronization via Core Segmentation

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Solution Overview

Problem

Current hardware-synchronized systems are limited to single-processor core operation, failing to utilize the computing capacity of additional processor cores in multicore processors, leading to underutilization and increased hardware overheads.

Innovation Solution

The method involves designating main processor cores as synchronization masters, with secondary processor cores acting as slaves, allowing them to process utility programs independently and transfer outputs to main cores, thereby achieving synchronized operation without interfering with synchronization, and utilizing shared memory for communication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple processor cores are used in hardware-synchronized systems, then computing capacity increases, but synchronization interference occurs and reliability decreases

Engineering Contradiction:
Improvecomputing capacityVSAvoidsynchronization reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The processor cores are segmented into two distinct groups: synchronization cores (one per channel) and utility cores (additional cores). This segmentation allows synchronization cores to exclusively handle synchronization tasks without interference from utility cores, while utility cores can execute additional programs independently. The physical separation of functions resolves the contradiction by enabling multiple cores to operate without mutual synchronization interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The synchronization function is extracted and assigned exclusively to specific processor cores (synchronization cores), separating it from the utility function of other cores. This extraction ensures that only designated cores participate in hardware synchronization, eliminating the interference problem that occurs when all cores attempt to synchronize simultaneously, while still allowing the system to utilize multiple cores for computing.

Inventive Principle:
Principle #2Taking out (Extraction)

2Productivity

If additional processor cores are activated, then computing power increases, but hardware overheads increase

Engineering Contradiction:
Improvecomputing powerVSAvoidhardware overheads
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Utility processor cores are designed with multi-functionality: they can execute utility programs independently while also being controllable by synchronization cores. This universality allows the system to utilize existing processor core infrastructure for multiple purposes without requiring separate dedicated hardware for each function, thereby increasing computing power while minimizing additional hardware overheads.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If all processor cores synchronize independently, then computing parallelism increases, but synchronization outputs impede each other

Engineering Contradiction:
Improvecomputing parallelismVSAvoidsynchronization operation
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

Processor cores are segmented into synchronization cores that handle synchronization operations and utility cores that handle computational tasks. This segmentation ensures that synchronization outputs from different channels do not impede each other, as only designated synchronization cores generate synchronization outputs. Meanwhile, utility cores can operate in parallel without interfering with the synchronization process, maintaining both computing parallelism and synchronization ease of operation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11301308B2Method for synchronized operation of multicore processors
Publication Date: 2022.04.12 SIEMENS MOBILITY GMBH
  • US11301308B2 patent drawing

AI summary

A method synchronizes the operation of a plurality of multicore processors. A first and a second multicore processor each have a main processor core and at least one secondary processor core that is used for executing utility programs. Only the main processor cores of the various multicore processors synchronize to one another. The at least one secondary processor core is controlled by the respective main processor core in each multicore processor. The utility programs are processed by the at least one secondary processor core and outputs are generated that are made available to the respective main processor core of the same multicore processor. Outputs from the multiplicity of multicore processors are then output in sync by the respective main processor core.