Multi-cycle etching for FinFET source/drain recess depth control

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Solution Overview

Problem

The semiconductor industry faces challenges in optimizing the integration density of electronic components due to limitations in feature size reduction, which affects the performance and efficiency of semiconductor devices like FinFETs, as existing manufacturing processes struggle to tailor source/drain recess depths for varying fin structures effectively.

Innovation Solution

A multi-cycle etching process is employed to form source/drain recesses of different depths in regions with single, double, and triple-fin devices, allowing for the formation of epitaxial source/drain regions of varying volumes, thereby improving device performance and current operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single etching process is used for all fin structures, then the manufacturing process is simple, but the source/drain recess depths cannot be optimized for different fin structures

Engineering Contradiction:
Improveability to tailor source/drain recess depths for varying fin structuresVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The manufacturing process is divided into multiple etching cycles, with each cycle targeting specific fin structures (single-fin, double-fin, triple-fin devices) to form source/drain recesses of different depths. This segmentation allows each fin type to receive customized etching treatment, optimizing the recess depth for each structure while maintaining overall process manageability through systematic organization of the multiple cycles.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different source/drain recess depths are created for different regions containing different fin structures. Single-fin devices receive one etching depth, double-fin devices receive a different depth, and triple-fin devices receive yet another depth. This local differentiation ensures that each region's fin structures receive the optimal recess depth tailored to their specific geometric and electrical requirements.

Inventive Principle:
Principle #3Local quality

2Productivity

If feature size is continuously reduced to improve integration density, then more components can be integrated, but the ability to maintain optimal source/drain recess depths is compromised

Engineering Contradiction:
Improveintegration densityVSAvoidsource/drain recess depth control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The multi-cycle etching process performs preliminary actions by creating source/drain recesses of different depths in successive etching cycles before subsequent processing steps. Each cycle prepares the appropriate recess depth for specific fin structures in advance, ensuring that when smaller feature sizes are used to increase integration density, the source/drain regions are already optimally prepared for each fin type's electrical and mechanical requirements.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the optimization of epitaxial source/drain regions for different fin structures, enhancing the operating current and performance of semiconductor devices by allowing for larger epitaxial volumes and reduced contact resistance.

Implementation Method 1

A multi-cycle etching process is employed to form source/drain recesses of different depths in regions with single, double, and triple-fin devices

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

allowing for the formation of epitaxial source/drain regions of varying volumes

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS20210265350A1Semiconductor device and method
Publication Date: 2021.08.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20210265350A1 patent drawing
  • US20210265350A1 patent drawing
  • US20210265350A1 patent drawing

AI summary

A method includes forming first devices in a first region of a substrate, wherein each first device has a first number of fins; forming second devices in a second region of the substrate that is different from the first region, wherein each second device has a second number of fins that is different from the first number of fins; forming first recesses in the fins of the first devices, wherein the first recesses have a first depth; after forming the first recesses, forming second recesses in the fins of the second devices, wherein the second recesses have a second depth different from the first depth; growing a first epitaxial source/drain region in the first recesses; and growing a second epitaxial source/drain region in the second recess.