Multi-Die Interface Bridge for Serializing Asynchronous Signals
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Solution Overview
Problem
When integrated circuit devices are separated into multiple dies, it becomes difficult to maintain efficient communication of asynchronous signals, as the number of available wires is limited compared to a monolithic interface, making it infeasible to connect each asynchronous signal across a unique interconnect wire.
Innovation Solution
An interface bridge is implemented between separate integrated circuit dies that samples signals based on their latency specifications, allowing asynchronous signals to be communicated synchronously and serially, preserving the appearance of asynchronicity while efficiently transmitting signals over a limited number of connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If integrated circuit devices are separated into multiple dies, then different components can be developed independently with different lithography techniques and schedules, but the number of available wires for signal communication is reduced
Solution Approach 1:
Multiple asynchronous signals are merged into a single synchronous serial communication channel. The interface bridge combines multiple signal lines into one serial stream, allowing multiple signals to share the same physical wire while maintaining their individual identities through time-division multiplexing and synchronization mechanisms.
Solution Approach 2:
The patent transitions from parallel communication (multiple wires simultaneously carrying signals) to serial communication (single wire carrying signals sequentially in time). This dimensional change from spatial parallelism to temporal sequencing allows multiple signals to be transmitted over fewer wires by adding the time dimension to the communication paradigm.
2Ease of operation
If each asynchronous signal is connected across a unique interconnect wire, then signal communication is straightforward, but it becomes infeasible when the number of wires is limited
Solution Approach 1:
The interface bridge acts as an intermediary device between the two separate integrated circuit dies. It receives multiple asynchronous signals from one die, processes them through synchronization and serialization, and transmits them as a single synchronous serial stream to the other die, thereby mediating the connection when direct wire-to-wire mapping is infeasible.
Solution Approach 2:
The patent changes the parameters of signal transmission by converting asynchronous timing characteristics to synchronous timing, and transforming parallel signal topology into serial signal topology. This parameter transformation allows the same information to be transmitted over fewer physical connections while maintaining signal integrity and timing relationships.
3Quantity of substance
If asynchronous signals are transmitted serially and synchronously, then fewer wires are needed, but the signals must be sampled according to latency specifications to preserve appearance of asynchronicity
Solution Approach 1:
The interface bridge performs preliminary actions by pre-sampling and buffering asynchronous signals before serialization. Signals are captured and held in synchronization buffers at predetermined timing points, allowing them to be later transmitted synchronously without losing their asynchronous characteristics. This preliminary sampling action enables the complex timing relationships to be managed systematically.
Solution Approach 2:
The patent employs periodic sampling of asynchronous signals at regular intervals determined by the synchronous clock. By periodically capturing signal states and using latency specifications to determine sampling frequency, the system transforms irregular asynchronous events into a periodic sampling framework that can be efficiently transmitted over serial synchronous channels.
Data Source
AI summary
A seemingly monolithic interface between separate integrated circuit die may appear to be parallel or asynchronous from the perspective of the separate integrated circuit die. The signals of the seemingly monolithic interface, however, may actually be communicated between the separate die via serial and/or synchronous communication. In one method, a number of signals stored in a first parallel interface on a first integrated circuit die may be sampled. In some cases, at least one of the signals may be sampled more often than another one of the signals. A serial signal may be generated based on sampled signals. The serial signal may be transmitted to a corresponding second parallel interface on the second integrated circuit die.