Multi-Die Package Thermal Circuit for Stacked SoC-DRAM Cooling
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Solution Overview
Problem
Existing semiconductor die packaging techniques fail to effectively dissipate heat generated by SoC IC dies, leading to reduced computing performance and shortened lifespan due to insufficient thermal conductivity and heat transfer properties in multi-die packages.
Innovation Solution
Incorporating a dome-shaped thermally-conductive structure between SoC IC and DRAM IC dies, combined with an underfill material, forms a thermal circuit that quickly spreads and transfers heat, maintaining junction temperature within the multi-die package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If semiconductor dies are stacked in a multi-die package to reduce lateral footprint and increase density, then the horizontal footprint and density are improved, but heat dissipation capability deteriorates due to insufficient thermal conductivity
Solution Approach 1:
The patent transitions from two-dimensional lateral heat dissipation to three-dimensional vertical heat dissipation by stacking thermal vias through multiple die layers. Thermal vias are formed vertically through the substrate and interlayer dielectric materials, creating a thermal conduction path in the Z-dimension that bypasses the lateral footprint constraint while effectively removing heat from stacked dies.
Solution Approach 2:
The patent introduces thermal vias as intermediary structures that mediate heat transfer between stacked dies and the external heat sink. These thermal vias act as thermal conduits, connecting the heat-generating die surfaces to the substrate's heat dissipation structures, thereby enabling efficient heat removal without increasing lateral footprint.
2Device complexity
If conventional packaging techniques are used without dedicated thermal management structures, then device complexity is reduced, but heat transfer efficiency deteriorates leading to reduced computing performance
Solution Approach 1:
The substrate serves multiple functions: it provides mechanical support for stacked dies, electrical interconnection through conductive traces, and thermal management through integrated thermal vias and heat sink structures. This multi-functionality allows the substrate to simultaneously enable device operation and active heat dissipation without proportionally increasing complexity.
Solution Approach 2:
The patent merges thermal management functionality with the structural substrate by integrating thermal vias directly into the substrate's fabrication process. Instead of adding separate thermal management components, the thermal conduction path is combined with the mechanical and electrical support structure, achieving efficient heat dissipation with minimal additional complexity.
3Temperature
If thermal vias are formed through the substrate to improve heat dissipation, then heat transfer efficiency is improved, but manufacturing complexity increases due to additional processing steps
Solution Approach 1:
Thermal vias are formed during the substrate fabrication process before die stacking, utilizing preliminary patterning and etching steps. This preliminary formation of thermal via holes allows subsequent filling with thermally conductive material in later processing stages, enabling efficient heat dissipation without requiring complex post-assembly thermal management operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The thermal circuit enhances the computing speed and reliability of SoC IC dies by effectively dissipating heat, ensuring the junction temperature remains within a threshold, thus improving performance and longevity.
Implementation Method 1
The heat transfer component, in combination with the underfill material, forms a portion of a thermal circuit having one or more thermal conductivity properties to quickly spread and transfer heat within the multi-die package
Data Source
AI summary
Some implementations described herein a provide a multi-die package and methods of formation. The multi-die package includes a dynamic random access memory integrated circuit die over a system-on-chip integrated circuit die, and a heat transfer component between the system-on-chip integrated circuit die and the dynamic random access memory integrated circuit die. The heat transfer component, which may correspond to a dome-shaped structure, may be on a surface of the system-on-chip integrated circuit die and enveloped by an underfill material between the system-on-chip integrated circuit die and the dynamic random access memory integrated circuit die. The heat transfer component, in combination with the underfill material, may be a portion of a thermal circuit having one or more thermal conductivity properties to quickly spread and transfer heat within the multi-die package so that a temperature of the system-on-chip integrated circuit die satisfies a threshold.