Multi-dimensional Memory Cluster with CXL Full-mesh Topology

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Solution Overview

Problem

Existing memory architectures, such as DDR, are not readily composable, making it challenging to construct large memory pools, which are necessary for advanced computing applications.

Innovation Solution

A multi-dimensional memory cluster system is developed with nodes connected in a full-mesh configuration, allowing for efficient allocation of memory based on service level needs, using Compute Express Link (CXL) connections and a novel addressing scheme that includes quality of service (QoS) and class of service (CoS) features, enabling deterministic latency control and fault isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If DDR memory with parallel interface is used, then memory capacity can be increased, but composability and ease of constructing large memory pools deteriorates

Engineering Contradiction:
Improvememory capacityVSAvoidcomposability
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The memory system is segmented into multiple independent memory nodes (205) that can be individually constructed and then composed together. Each node contains memory devices and a controller, creating modular units that can be assembled into larger memory pools through standardized interconnects, thereby improving composability while maintaining scalability of memory capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory nodes are designed with universal interfaces (CXL, PCIe) that enable them to function both as standalone memory units and as components of larger memory pools. The standardized connection protocols allow the same node design to be used in various configurations, from single nodes to large distributed memory systems, enhancing both composability and versatility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If memory nodes are connected in full-mesh configuration, then access speed and latency control improve, but system complexity increases

Engineering Contradiction:
Improveaccess speedVSAvoidsystem complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system transitions from traditional two-dimensional memory组织 to an N-dimensional topology where nodes are arranged across multiple dimensions (e.g., 4 dimensions with 4 nodes each). This dimensional expansion allows full-mesh connectivity within each dimension while reducing overall system complexity through structured organization, enabling efficient access paths without requiring complete interconnection of all nodes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The memory cluster is organized as nested structures where basic building blocks (4-node clusters) are nested within larger dimensional frameworks. Each nested level maintains full-mesh connectivity locally while interfacing with higher levels through standardized ports, achieving fast access within clusters while managing complexity through hierarchical organization.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Adaptability or versatility

If service level descriptors are implemented for different nodes, then memory allocation adaptability improves, but information management complexity increases

Engineering Contradiction:
Improvememory allocation adaptabilityVSAvoidinformation management complexity
Core Design Contradiction:
Adaptability or versatilityVSLoss of information

Solution Approach 1:

Service level descriptors are pre-configured and stored in each memory node before runtime operations. These descriptors contain predetermined service level characteristics (fast, slow, etc.) that are discovered and cached by the host system during initialization, eliminating the need for complex real-time information management during memory allocation operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Each memory node autonomously maintains its own service level descriptor information, eliminating the need for a centralized information management system. The descriptors are self-contained within nodes and can be independently queried and updated, reducing overall system information management complexity while enabling adaptive memory allocation based on node-specific characteristics.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12111776B2Multi-dimensional memory cluster
Publication Date: 2024.10.08 SAMSUNG ELECTRONICS CO LTD
  • US12111776B2 patent drawing
  • US12111776B2 patent drawing
  • US12111776B2 patent drawing

AI summary

A multi-dimensional memory cluster. In some embodiments, the memory cluster includes a first node, having an external port for making a connection to a host; a second node, connected to the first node by a first memory-centric connection; the second node storing a service level descriptor; the first node being configured to: receive, from the host, a first request, addressed to the second node, for the service level descriptor; and forward the first request to the second node, the second node being configured to: receive the first request; and send a first response, to the first node, the first response including the service level descriptor of the second node.