Selective Error Rate Culling in Multidimensional Memory

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Solution Overview

Problem

Managing error rates in multidimensional memory systems is challenging due to the complexity of identifying error-prone portions across different dimensional views, which hinders efficient data storage and error correction.

Innovation Solution

Implementing layered filtering that allows intersecting filter domains to share accumulators, enabling efficient error rate collection and exclusion of error-prone memory entities without requiring independent tabulation, and using a controller to determine and cull two-dimensional and three-dimensional memory entities based on error rate information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If independent tabulation is used for each filter domain, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveerror rate measurement precisionVSAvoidfilter domain tabulation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the tabulation of intersecting filter domains by allowing them to share accumulators. Instead of creating independent tabulations for each filter domain, the system combines their error rate accumulation functions, reducing the overall complexity of the tabulation structure while maintaining the ability to measure error rates accurately across different domains.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The accumulators are designed to serve multiple filter domains simultaneously. A single accumulator can be shared by multiple intersecting filter domains, allowing it to perform the error rate accumulation function for all domains that intersect at a particular memory entity. This multi-functionality reduces the total number of accumulators needed and simplifies the overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If layered filtering is implemented without shared accumulators, then measurement precision is improved, but productivity decreases

Engineering Contradiction:
Improveerror rate collection accuracyVSAvoiderror rate collection efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent combines the error rate accumulation operations of multiple filter domains by allowing them to share common accumulators. This merging approach maintains the precision of layered filtering while improving productivity by eliminating redundant accumulation operations and reducing the computational overhead associated with maintaining separate accumulators for each intersecting domain.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If all memory entities are monitored at full resolution, then reliability is improved, but use of energy increases

Engineering Contradiction:
Improvedata integrityVSAvoiderror rate collection energy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by monitoring error rates at different resolutions for different memory entities. Instead of uniformly monitoring all memory entities at the highest resolution, the system adjusts the monitoring resolution based on the specific characteristics and error rates of individual memory entities or regions. This allows the system to maintain high reliability for critical areas while reducing energy consumption in less critical areas.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10922174B2Selective error rate information for multidimensional memory
Publication Date: 2021.02.16 MICRON TECHNOLOGY INC
  • US10922174B2 patent drawing
  • US10922174B2 patent drawing
  • US10922174B2 patent drawing

AI summary

A memory device can include three-dimensional memory entities each including a plurality of two-dimensional memory entities. A controller can read data from the memory at a first resolution and collect error rate information from the memory at a second resolution including a portion of a two-dimensional memory entity. The controller can determine a quantity of two-dimensional memory entities that have a greater error rate than a remainder of the two-dimensional memory entities based on the error rate information. The controller can determine a quantity of portions of three-dimensional memory entities that have a greater error rate than a remainder of the portions of three-dimensional memory entities based on the error rate information excluding error rate information for portions of the two-dimensional memory entities associated with the quantity of two-dimensional memory entities. The controller can cull the quantity of the two-dimensional memory entities and the quantity of the three-dimensional memory entities.