Multifunction Soft-Start Pin for Accurate Current Limit Sensing
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Solution Overview
Problem
Conventional DC-DC converters require separate pins for Soft-Start (SS) and Over Current Limit (OCL) functionalities, leading to design complexities and accuracy issues due to the dependence on internal resistances and capacitances, which can vary significantly.
Innovation Solution
A circuit utilizing a single pin for both SS and OCL functions, employing a parallel resistor-capacitor network with transistors and current sources to independently control the SS and OCL operations, allowing for accurate capacitance and resistance sensing through a current mirror and source-follower configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate pins are used for Soft-Start and Over Current Limit functionalities, then each function can be independently controlled, but the device complexity increases and manufacturing precision requirements increase
Solution Approach 1:
The patent combines two separate pins (one for Soft-Start and one for Over Current Limit) into a single multifunctional pin. This pin serves dual purposes: during startup it controls the soft-start timing by charging an external capacitor, and during normal operation it sets the over current limit through an external resistor. This merging reduces the total pin count and simplifies the device interface while maintaining independent control of both functions through time-multiplexed operation.
Solution Approach 2:
The patent creates a universal pin that can perform multiple functions depending on the operational phase. The same pin is used for both Soft-Start timing control (by connecting to a capacitor) and Over Current Limit setting (by connecting to a resistor). The circuit internally switches between these functions based on whether the converter is in startup mode or normal operation mode, making the pin multi-functional rather than requiring dedicated pins for each function.
2Device complexity
If internal resistance and capacitance values are used for SS and OCL programming, then the circuit is simpler, but DC accuracy deteriorates due to significant variations in these internal values
Solution Approach 1:
The patent changes the approach from using fixed internal resistance and capacitance values to using externally programmable resistance and capacitance values. By providing pins that accept external resistors and capacitors, the converter allows users to precisely set the Soft-Start time constant and Over Current Limit values according to their specific application requirements. This external programming method eliminates the accuracy issues caused by process variations in internal components while maintaining circuit simplicity through a unified pin interface.
3Measurement precision
If a separate pin is used for biasing resistance to improve DC accuracy, then measurement precision improves, but device complexity increases due to additional pin requirements
Solution Approach 1:
The patent merges the biasing resistance function with the existing Soft-Start and Over Current Limit pin. Instead of adding a separate bias pin, the same pin that controls SS and OCL is also used to provide the biasing current reference. This is achieved by internally routing the bias current through the same node where the external resistor connects, thereby eliminating the need for an additional pin while maintaining improved DC accuracy through external resistance programming.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate and independent control of SS and OCL operations using a single pin, improving design efficiency and reducing the impact of internal resistance and capacitance variations on DC accuracy.
Implementation Method 1
a constant internal current is pumped into an external capacitor (CEXT) until the voltage across it reaches a certain value
Implementation Method 2
The source-follower transistor configuration is stable and independent of the capacitance of the capacitor of the RC network
Implementation Method 3
current mirror circuitry configured to generate a first reference current (e.g., ISS) for an SS operation based on a constant current
Data Source
AI summary
Circuits and systems include a parallel resistor-capacitor (RC) network coupled between a pin and ground, and first and second transistors coupled in source follower configuration with a common gate coupling. The source of the first transistor is coupled to the pin. A first switch couples a drain of the first transistor to the common gate coupling during soft-start (SS) and decouples that connection during over current limit (OCL) sensing, and a second switch couples a drain of the second transistor to the common gate coupling during OCL sensing and decouples that connection during SS. A first current source is enabled deliver a constant current to the pin during SS. A second current source is enabled to generate a reference voltage at the source of the second transistor during OCL, which reference voltage is transferred to the pin by the source follower configuration. A comparator controls the switches to transition from SS to OCL sensing. The comparator output signal is based on a comparison of the voltage at the pin to a threshold voltage.