Multi-Gate Source/Drain Epitaxy With Adhesion Layer Continuity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
GAA transistor fabrication faces challenges due to scaling down of semiconductor IC dimensions, leading to source/drain layer discontinuity, which results in short-channel control degradation, high sub-threshold leakage, and increased parasitic capacitance, particularly affecting SRAM device performance.
Innovation Solution
The introduction of an adhesion layer, such as di-borane or di-phosphorous based materials, is formed within the source/drain region to ensure a uniform base for subsequent epitaxial growth, preventing source/drain layer discontinuity by bonding to both Si channel and SiN inner spacer surfaces, allowing for continuous epitaxial layer formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fabrication techniques are used for GAA transistors, then manufacturing simplicity is maintained, but source/drain layer discontinuity occurs leading to degraded short-channel control and high sub-threshold leakage
Solution Approach 1:
An adhesion layer is introduced as an intermediary between the Si channel layers and the source/drain epitaxial layers. This adhesion layer serves as a mediator that enables continuous epitaxial growth by providing a uniform base that bonds to both the Si channel and SiN inner spacer surfaces, thereby preventing source/drain layer discontinuity and improving short-channel control without requiring fundamentally new fabrication techniques
Solution Approach 2:
The adhesion layer is formed in advance before the source/drain epitaxial layers are grown. This preliminary action ensures that a uniform bonding surface is prepared beforehand, which prevents discontinuity during the subsequent epitaxial growth process and eliminates the need for complex corrective measures later in fabrication
2Reliability
If conventional fabrication techniques are used for GAA transistors, then manufacturing simplicity is maintained, but sub-threshold leakage increases due to source/drain layer discontinuity
Solution Approach 1:
The adhesion layer acts as a mediator that ensures continuous bonding between the Si channel layers and source/drain epitaxial layers. This continuous interface prevents leakage paths that would otherwise occur at discontinuity points, thereby reducing sub-threshold leakage while adding only a single deposition step to the fabrication process
3Reliability
If conventional fabrication techniques are used for GAA transistors, then manufacturing simplicity is maintained, but parasitic capacitance increases affecting SRAM device performance
Solution Approach 1:
The adhesion layer serves as a mediator that creates a continuous, uniform interface between the Si channel and source/drain regions. This continuity reduces irregularities at the interface that would otherwise increase parasitic capacitance, thereby improving SRAM device performance with minimal added fabrication complexity
4Manufacturing precision
If adhesion layer is introduced to prevent source/drain layer discontinuity, then short-channel control is enhanced, but manufacturing complexity increases
Solution Approach 1:
A single adhesion layer deposition step is introduced as an intermediary process before epitaxial growth. This simple addition of one process step ensures continuous source/drain layer formation by providing a uniform bonding surface, achieving high manufacturing precision with minimal increase in fabrication process complexity
Solution Approach 2:
The adhesion layer modifies the surface properties (chemical composition and surface energy) of the Si channel and inner spacer interfaces. This parameter change enables uniform epitaxial growth and continuous source/drain layer formation, improving manufacturing precision while requiring only a standard deposition process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances short-channel control, reduces sub-threshold leakage, and improves SRAM cell yield and operation margin by ensuring continuous source/drain epitaxial layers in GAA transistors, critical for advanced SRAM devices.
Implementation Method 1
an adhesion layer, such as di-borane or di-phosphorous based materials, is formed within the source/drain region to ensure a uniform base for subsequent epitaxial growth, preventing source/drain layer discontinuity by bonding to both Si channel and SiN inner spacer surfaces
Implementation Method 2
epitaxially growing a continuous first source/drain layer over the adhesion layer along the sidewall surface of the trench
Data Source
AI summary
A method of fabricating a device includes providing a fin extending from a substrate in a device type region, where the fin includes a plurality of semiconductor channel layers. In some embodiments, the method further includes forming a gate structure over the fin. Thereafter, in some examples, the method includes removing a portion of the plurality of semiconductor channel layers within a source/drain region adjacent to the gate structure to form a trench in the source/drain region. In some cases, the method further includes after forming the trench, depositing an adhesion layer within the source/drain region along a sidewall surface of the trench. In various embodiments, and after depositing the adhesion layer, the method further includes epitaxially growing a continuous first source/drain layer over the adhesion layer along the sidewall surface of the trench.