Multi-Gate FET Gradient Cap Layer for Lattice Mismatch
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Solution Overview
Problem
Existing Multi-Gate Field-Effect Transistors face challenges in maintaining smooth surface epitaxial structures and reducing stress-induced defects, which can lead to black spots and increased contact resistance, particularly due to lattice mismatch between epitaxial and substrate materials.
Innovation Solution
A Multi-Gate Field-Effect Transistor process involving the formation of a fin-shaped structure, an epitaxial structure with a gradient germanium concentration, and a gradient cap layer with decreasing germanium concentration from inner to outer, which helps in smoothing the surface and maintaining stress within the gate channel, thereby preventing black spots and enhancing transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a strained silicon layer is grown epitaxially on a silicon substrate with an epitaxial structure, then carrier mobility is increased and speed performance is enhanced, but surface smoothness deteriorates and black spots appear due to lattice mismatch
Solution Approach 1:
The patent applies parameter changes by implementing a gradient cap layer where the germanium concentration varies continuously from the interface with the epitaxial structure to the top surface. This gradient composition (e.g., SiGe with decreasing Ge concentration) allows the lattice constant to transition smoothly, maintaining surface smoothness while preserving the strain necessary for high carrier mobility in the channel region.
Solution Approach 2:
The patent applies local quality by creating different regions with distinct properties: the cap layer has a gradient germanium concentration profile where the bottom portion (near the epitaxial structure) has higher Ge content to maintain lattice matching and surface smoothness, while the top portion has lower Ge content to provide the necessary strain for high-speed performance in the channel.
2Ease of manufacture
If a cap layer with uniform composition is used, then manufacturing is simplified, but stress distribution becomes non-optimal and surface defects increase
Solution Approach 1:
The patent implements parameter changes by using a cap layer with gradient germanium concentration rather than uniform composition. The concentration profile transitions from higher Ge content at the bottom (providing lattice matching) to lower Ge content at the top (providing strain), thereby achieving both surface quality and device performance without significantly complicating the manufacturing process.
3Manufacturing precision
If the germanium concentration in the cap layer is high, then lattice matching with the epitaxial structure is improved and surface smoothness is maintained, but the strain on the channel is reduced and carrier mobility decreases
Solution Approach 1:
The patent resolves this contradiction by implementing a gradient cap layer where the germanium concentration is not uniform but varies continuously. The bottom portion has high Ge concentration for lattice matching and surface smoothness, while the top portion has lower Ge concentration to provide adequate strain on the channel for high carrier mobility, thus achieving both surface quality and device performance simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process ensures smooth surfaces and reduced stress within the gate channel, preventing black spots and improving the transistor's performance by maintaining a stable interface between the epitaxial and cap layers, thus enhancing the overall efficiency of the Multi-Gate Field-Effect Transistor.
Implementation Method 1
lattice mismatch between epitaxial and substrate materials
Implementation Method 2
maintaining stress within the gate channel
Data Source
AI summary
A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from inner to outer. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor.